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I'm using the UC3843A PWM-controller for buck DC/DC.
How do i have to design the loop compensation circuit of the error amp?
The output filter components: L= 100uH ; C = 680uF (ESR=0.2).
=> pole at 610Hz; zero at 1.17kHz
The switching freq. is about f=190kHz.
So I should try to set the crossover freq. of the system loop to f/4 = 47.5kHz and set the pole of the comp. loop to 1.17kHz.
Are there any design guide or excel sheets to calculate the comp. loop for the UC3843A? The chip is not in the webbench.
Thanks for your help,
4705.Compensate a peak current mode buck converter_slup173.pdf
There is no specific excel sheet that calculates the loop of the UCC2843, but from page 5-16 of the attached document, it is explained how to compensate a peak current mode buck converter.
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