HI,
I wish to use the REF3112 device as a voltage reference for the ADC on my 7 Series Xilinx FPGA. I have chosen this as it is part of the recommended circuit from Xilinx in their "XADC User Guide" document (UG480) shown attached
However the specs for the REF3112 list the minimum input voltage as 1.8V which suggests there may be issues if the voltage voltage dips to 1.71V as suggested by the +/-5% in the diagram attached. Has anyone tried this part at or below 1.8V? Is the 1.8V an absolute minimum or does this allow for such percentage tolerances below the nominally specified voltage
Thanks