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TPS40210 MOSFET over heating

Prodigy 130 points

Replies: 24

Views: 3158

I am using the TPS40210 as a 81V boost circuit. I have used Webench Buck / Boost circuits many time with no problems. But this one is giving me trouble.

The MOSFET is running hot, even with no load. At 100ma load it heats up enough to melt the solder joint. I started with a TI CSD19533Q5A MOSFET Rds ~ 8mohm, then switched to a Toshiba TPW4R50ANH Rds <4mohm.

Toshiba is running noticeably cooler but still way to hot.

The gate drive looks good at just over 8V (internal 8V LDO), but the drain (while switched on) is still hovering at around 2V. I expect this to be much closer to 0. The source is at zero. I must be missing something. Why am I not slamming the FET on all the way to gnd?

24 Replies

  • Hi John,

    My first suspicion is the series GDRV resistor is limiting the turn on speed too much. This could be checked by measuring the voltage at both sides of the resistor when it turns on the MOSFET. You may see a voltage drop across the resistor as the TPS40210 tries to turn on the MOSFET. Could you try making this 0 ohms to see if there is any improvement?

    Also if you still have it, could you send the report for the WEBENCH circuit you based your design on?

    Best Regards,
    Anthony

    DC/DC Power Applications Engineer

  • In reply to Anthony F:

    I have tried shorting the gate resistor, no change.webench_design_16221_33_702190612.pdf

  • In reply to John Smeltzer:

    Still having serious MOSFET over heating issues.

     

    I have tried ...

    several different MOSFETs (different packages / different manufactures)

    different inductors

    different gate resistance 0 - 20 ohm

    transistor gate buffer

     

    At first I thought it was from the drain only being driven down to 2V, not closer to gnd.

    See screen Rigol capture. Now not even sure that's real ... see Tektronix capture.

     

    Now wondering about the spike on the gate. It is only present under load. Could this be the source of my overheating? some kind of miller coupling?

     

    Any suggestions are appreciated.

    Drain:

    Drain: (old school) looks like .5V, not 2V Rigol shows

    Gate on top / drain on bottom:

  • In reply to John Smeltzer:

    Thank you for providing the further details on this. Since it looks like the MOSFET is getting turned on correctly and it may have just been an error in the measurement, the next thing to check is the PCB layout. I don't see anything obvious which could be causing this after looking over the schematic and WEBENCH design.

    Two specific things I'm looking to check on the layout are:

    1. How much copper area the pad of the MOSFET is soldered down to
    2. The placement of the components in the critical switching loop. The critical switching loop is through the MOSFET, schottky diode, output capacitor and current sense resistor.

    DC/DC Power Applications Engineer

  • In reply to Anthony F:

    I am currently using the eval PCB for prototyping.
    It overheats so extremely, and at very low loads (100ma), I just don't understand it.
    Is it not as simple as P = I * I * Rdson ?

    http://www.ti.com/lit/ds/symlink/tps40210.pdf

  • In reply to John Smeltzer:

    One thing about the EVM pcb layout is it doesn't have the right footprint for this MOSFET. Is the pad soldered down or are just the pins connected? If the pad isn't soldered down it could reduce the thermal performance.

    The conduction loss in the MOSFET is I*I*Rdson*D, where I is approximately the input current. In addition to the conduction loss, another power loss in the MOSFET is the switching loss each time it turns on and off. If this power loss is what is causing the overheating it could be reduced by lowering the switching frequency. As a test can you try reducing the switching frequency to about 300k by changing RRC to 549kΩ?

    DC/DC Power Applications Engineer

  • In reply to Anthony F:

    The part is soldered down, the pins actually align right up with the SOIC layout. I have also tried a few 100V SOIC fets as well.
    All seem to behave the same. I will try reducing the frequency as you suggest.
    What is the "D" you are referring to?

    Thanks for the suggestion.
  • In reply to John Smeltzer:

    Having the drain pad soldered down is important for the thermal performance. The FETs in the SOIC package are probably rated for less power too because they do not have a pad.

    D is the duty cycle. For a boost it is estimated by (Vout-Vin)/Vout.

    DC/DC Power Applications Engineer

  • In reply to Anthony F:

    Anthony - I decreased the frequency to 300KHz as you suggested. That has helped. At 500KHz the solder would melt at 100ma load, now it is almost 300ma. I still believe I am dissipating significantly more wattage than I expect / math suggest.

     

    Can you please call to discuss? 614-451-5646. If I don't get this under control today I will have to switch approach tomorrow.

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