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TPS23754-1 frequency sync and FRS questions

Dan Andersen
Genius 11270 points
Other Parts Discussed in Thread: TPS23754-1

Hello,

We are using the TPS23754-1 in a poe application and are having difficulty getting the external frequency sync function to work.  My customer is concerned that the ~2V sync pulse at FRS could potentially pull the FRS node below zero, and it has a -0.3V absolute max tolerance on this pin.

They were not able to find a spec in the datasheet if any DC was present on this FRS to counter this.  In datasheet pictures it appears this node is connected to GND:

Do they have anything to worry about here?  Is there DC or some other effect to keep the FRS node from being pulled below ground when AC coupled to an external sync pulse?

Thanks,

Dan 

  • 0
    TI__Mastermind 40100 points
    Hi Dan,

    Is the IC damaging? Can you send a waveform of what the signal looks like on FRS-RTN? Thanks!
  • 0 in reply to Darwin Fernandez
    TI__Genius 11270 points
    They don't think so - yet - but are concerned. It would seem to me there must be some DC bias on the FRS pin so you can program the fsw. If that's the case - and the Vpp of AC signal on FRS is less than 2X the DC bias level on FRS it should be no issue, but I see no information on DC level for this pin, nor do we see any clues in the part block diagram (aside from FRS being "high impedance").
  • 0 in reply to Dan Andersen
    TI__Mastermind 40100 points
    Hi Dan,

    There are a couple of ‘gotchas’ that I went through to get this configuration to work.

    1. It’s important to measure the voltages with an oscope directly on the FRS pin to RTN. Depending on how the func gen is configured (ex output impedance settings), it may not be the same voltage on FRS pin as the settings shows. As such, be sure the voltage does not exceed the 5V maximum so I recommend setting the signal such that the oscope measurement on FRS is around 4V.

    2. Even if the datasheet says >25ns, which is true, there is an upper limit on the duty cycle/pulse width of the func gen or driving signal. Since the off-time period doesn’t begin until the pulse terminates, too long of the func gen’s duty cycle/pulse width will effect the duty cycle of the converter. To be on the safe side, I recommend keeping a 10% duty cycle or low pulse width <250ns.

    Under the above circuit and above conditions I was able to drive the TPS23754EVM’s frequency up to 400kHz without the unstable switching. This was under all recommended input voltage and load conditions.