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LM22672 abnormal behavior/ Loop compensation

Other Parts Discussed in Thread: LM22672

I am considering the use of the LM22672 IC in a design powered by 24Vdc.

The intended output is 5.489V, 500mA

There are two aspects mentioned on the datasheet I would like to clarify:

1. "-5.0" option may provide better loop bandwidth than the "ADJ" version;

2. The internal compensation loop of the "-ADJ" option is optimized for output voltages below 5V.

3. The "-5.0" option is to be used at output voltages greater than 5V

4. It also mentions that the use of a voltage divider on the "enable" input is recommended to prevent abnormal device operation if the input falls below the minimum of 4.5V

Based on the statements presented, I would like to understand if the loop compensation and the abnormal device operation issues mentioned could cause a system overvoltage in the event of input voltage instability.

  • Hi Fabio,

    Let me see if I understand the question correctly?

    Are you asking if the part were at 24Vin.  Could  loop instability and or abnormal operation below 4.5V cause a system overvoltage?

    My response is that it depends upon the setup of the device.  Buck converters have a negative input impedance.  So their input capacitors (if low esr) and any input inductance can form an LC tank that can ring above VIN.  This is usually handled by having some electrolytic or high ESR capacitors to damp the resonance if long leads or significant inductance is expected from the DC input supply.  If there is resonance on Vin from this LC tank the magnitude  could be made worse if the phase margin of the part is low.

    Since your device is at 24V.  Theoretically it could ring up to 48V, but this amount of ringing is unlikely and a damping capacitor would eliminate this issue.

    I response to the specific line items.

    Item 1) 2), and 4) The fixed 5V part has a higher gain than the adj version.  This allows better transient response by increasing the loop crossover frequency.

    Item 3)  The device has been designed to work down to voltages of 4.5Vin.  This note is just to remind people that if they have a slow VIN rise or fall they should use EN as a UVLO for cleaner start up and shutdown of the part.

    Regards,

    Marc

  • Hi Marc,

    Many thanks for the explanation.

    My point is if any of the datasheet aspects I mentioned may cause abnormal behavior leading the device to not properly regulate when the input voltage reaches the stable 24V after an event of input voltage disturbance.

    Could you clarify if an input voltage disturbance may cause the device to present abnormal behavior after recovering the nominal 24V input (considering ADJ option and floating enable pin)?

    Best Regards,
    Fabio Santana
  • Hi Fabio,
    The abnormal behavior mentioned is for the device operating below 4.5Vin. If the input voltage has recovered to 24V then you should not see abnormal behavior. During an input voltage disturbance you will see the output voltage move as the loop moves to a new operating point. This will look similar to a load transient.

    The Floating enable pin is a different issue. There is a pull-up current from Vin. If Vin dips below the Enable threshold or you see leakage currents (from contamination or moisture etc) greater than the 6uA pull up current then you could see the part turn on and off. If you want more precise control of the Enable pin that you should connect it to a known voltage.

    Marc
  • Hi Marc,
    The datasheet is not clear when it mentions "abnormal behavior" and its extension. There are devices which when an abnormal behavior occurs it enters into a latch-up condition and don't resume the expected behavior even when the input condition normalizes.
    Thanks for confirming the extension and behavior of the abnormal behavior mentioned.

    Regards,
    Fabio Santana