I am considering the use of the LM22672 IC in a design powered by 24Vdc.
The intended output is 5.489V, 500mA
There are two aspects mentioned on the datasheet I would like to clarify:
1. "-5.0" option may provide better loop bandwidth than the "ADJ" version;
2. The internal compensation loop of the "-ADJ" option is optimized for output voltages below 5V.
3. The "-5.0" option is to be used at output voltages greater than 5V
4. It also mentions that the use of a voltage divider on the "enable" input is recommended to prevent abnormal device operation if the input falls below the minimum of 4.5V
Based on the statements presented, I would like to understand if the loop compensation and the abnormal device operation issues mentioned could cause a system overvoltage in the event of input voltage instability.