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TPS54225 power good

Jonathan Kolbrak
Intellectual 460 points
Other Parts Discussed in Thread: TPS54225

I'd like to be able to connect a few power good outputs from various LDO's and switchers together as they are open-drain.  The TPS54225 says to connect the PG to VREG5 pin.  VREG5 says it is approx 5V and I need to pass the PG chain to an FPGA running at 3.3V.  Can the PG pin on the TPS54225 be connected to something besides VREG5?  If so does VREG5 still need some resistor to PG or just the bypass cap?

Jon

  • 0
    TI__Guru**** 191445 points
    The issue is what you expect to have happen when the device is disabled. You could theoretically pull up to most any available voltage rail below the abs max. However when the TPS54225 is disabled, the output voltage is not present, the PG function is not active, and the external rail will pull PG up indicating that "power is good" even though the TPS54225 rail is not enabled. The VREG5 voltage is also disabled when the TPS54225 is disabled, so PG will be seen as not pulled up or low indicating "power is not good".

    If you decide to pull up to a different rail, you just need the capacitor on VREG5.
  • 0 in reply to JohnTucker
    Intellectual 460 points
    So, the TPS54225 would be hard wired on so the only time the it would be off is if Vin goes away. In this case then the PG would be low (if Vin went away) even if it was pulled up on a rail different than the VREG5?
  • 0 in reply to Jonathan Kolbrak
    TI__Guru**** 191445 points
    Sounds like that should be ok. With VIN falling, the internal UVLO is referenced to VREG5. When VIn falls to about 3.65 V, VREG5 will fall below the UVLO threshold and turn the device off. I don't think there would be any timing issues where there would be false indications. It would really depend on your complete architecture and timing. In any case, the above is the reason for recommending PG pull up to VREG5.