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LMG3410: configuration with digital isolator

Part Number: LMG3410

Hi

Our customer are going to use this device. And they are considering the configuration with digital iso.(ISO7831,ISO7821 etc..)

There are two configuration.

 1. The digital isolator is used for high side and low side.

      (e.g. LMG3410HB-EVM   http://www.tij.co.jp/jp/lit/ug/snou140/snou140.pdf

 2. The digital isolator is used for only high side.

      (e.g. Datasheet Page 1.   Simplified system diagram )

Which do you recommend?  The cost of #1 will be higher than #2.

Could you give us any advices for each type of configuration if there are any concerns? 

We would like to chose the #2 if there are not any concerns.

Regards,

Koji Hamamoto

  • Hello Mr. Koji,

    Thank you for reaching us. The answer to your question depends on the end application;

    For isolated topologies, where controller sits on the secondary side, both high side and low side gate signals should be isolated.

    For non-isolated topologies such as totem pole pfc, the digital ISO for the low side can be removed if;
    1) The controller compensates the delay mismatch between high side and low side gate signals, since high side PWM signal would have additional prop delay as the signal is level shifted.
    2) The power and noise signals are decoupled with proper layout, and AGnd is Kelvin connected to the source of low side FET. Otherwise, high frequency noise can distort the input PWM signal.
    3) The high frequency noise on the PWM signal should be filtered by an RC filter.

    We would be happy to answer any follow on questions you have.

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