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UCC27524A-Q1: "RNMOS, Pull Up" On resistance value

Hiroshi Doi35
Expert 2845 points
Part Number: UCC27524A-Q1

Dear all,

My customer want to know that each 3 FETs gate pulse width and mutual phase
of datasheet P14 Figure 20.

Because ROH= Pch is 5 ohms it's too BIG,
and no description about parallel "RNMOS, Pull Up" on resistance value.

Thank you.

  • 0
    TI__Mastermind 31580 points
    Hi Doi-san,

    I have asked one of the HPD engineers to respond to your question, you should see a response soon.

    Regards

    Peter
  • 0
    TI__Intellectual 2910 points

    Doi-san,

    In the UCC27524A-Q1 device, the effective resistance of the hybrid pullup structure during turnon is estimated to be approximately 1.5 × ROL, based on design considerations. Taking the spec for ROL from the Electrical Characteristics table, the estimate for the effective resistance of the hybrid pullup structure during turnon, including the parallel "RNMOS, Pull Up)" is:

    PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
    Effective resistance of the hybrid pullup During turn-on 0.225 0.75 1.5 Ω

    The NMOS pull-down (ROL) and the PMOS pullup (ROH) have complimentary behavior. For low-to-high output transitions, ROH and RNMOS,pullup turn on at effectively the same time, with RNMOS,pullup staying on for only a short pulse. I will consult with the IC designer on the duration of the pulse, but please note this may be TI proprietary information and I may not be able to share.

    I do hope that thispost has helped address your question. If it has, please press the "Verify Answer" button below.

    Regards,

    - Daniel

  • 0 in reply to Daniel Ruiz
    Expert 2845 points
    Daniel-san,

    Thanks!
    I an now waiting for customer's reply.
    If T inc. and Customer contract NDA, proprietary information can be open? May be No.
    If Effective resistance of the hybrid pullup spec is in the specsheet, more customer use this.

    Thank you,

    H.DOI