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LM43602-Q1: Operation at Low Input Voltage

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Replies: 3

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Part Number: LM43602-Q1

Hello,

I'd like to ask some questions about LM43602-Q1.

  • At the input voltage of 6 to 6.5 V that will not rise further, will a LM43602-Q1 switch its switching mode between PWM/CCM and PWM/DCM or between PWM/DCM and PFM/DCM automatically depending on the load condition unlike LM53602-Q1?
    • LM53602-Q1 will be forced to operate in PWM unless its input voltage once goes above its threshold of about 6.8 V.
  • Is the timing of switching mode changes (CCM to/from DCM in PWM and PWM to/from PFM in DCM) determined by the input voltage? I guess from the data sheet that it depends solely on the inductor current. I'd like just to confirm.
  • What will the LM43602-Q1's minimum drop-out voltage look like? If the idea is the same as LM53602-Q1, I guess the high-side MOSFET's RON is a major factor. Could you provide me with the possible Max RON of the LM43602-Q1's high-side MOSFET? It's not written on the data sheet.
  • In theory, the minimum input voltage that hits the tOFF-MIN restriction is estimated at 5.71 V when the VOUT is 5 V. However, Figure 12 of the data sheet shows the switching frequency starts to drop at around VIN = 6.0 V with IOUT = 1.5 A. What's wrong with my estimation?
    • The duty cycle when it hits the tOFF-MIN with FS = 500 kHz is 87.5% (= (2 µs - 250 ns (tOFF-MIN (Max)))/(2 µs) × 100%).
    • VIN under this condition is estimated at 5.714 V from the equation D = VOUT/VIN, here VIN = VOUT/D = (5 V)/(0.875).
  • What are the recommended external component values for the following operating conditions?
    • FS = 500 kHz, VIN = 5.5 to 14.5 V, VOUT = 5 V, IOUT = 0 to 1.5 A
  • If they are on the 10th column of Table 2 of the data sheet (FS = 500 kHz, VOUT = 5 V), can the COUT be smaller than the recommended 100 µF? Which performance will be degraded if the COUT is smaller than 100 µF?

Best regards,
Shinichi Yokota

  • I will try to answer your questions:

    •At the input voltage of 6 to 6.5 V that will not rise further, will a LM43602-Q1 switch its switching mode between PWM/CCM and PWM/DCM or between PWM/DCM and PFM/DCM automatically depending on the load condition unlike LM53602-Q1? •LM53602-Q1 will be forced to operate in PWM unless its input voltage once goes above its threshold of about 6.8 V.
    ---------The LM43602 does not have force PWM mode. If the output voltage is 5V, with reducing load, the operation mode should be CCM/DCM/PFM. There is a chance the LM43602 cannot enter PFM mode with low VIN, 6V is around there.

    •Is the timing of switching mode changes (CCM to/from DCM in PWM and PWM to/from PFM in DCM) determined by the input voltage? I guess from the data sheet that it depends solely on the inductor current. I'd like just to confirm.
    ------------CCM to DCM transition is only determined by inductor current, as soon as the current valley reached zero ampere, it will be DCM. The transition to FPM depends on Vout offset. When the on time reached the min-on-time, or the internal Vcomp reached min value, the on-time of the DCM operation cannot reduce anymore, so Vout will start to rise a little, creating a positive offset. This small offset triggers PFM. But when Vin is too low, there's a chance that the peak current under this condition is too low to charge the Vout with a positive offset. That's why I said it may not enter PFM with low Vin.

    •What will the LM43602-Q1's minimum drop-out voltage look like? If the idea is the same as LM53602-Q1, I guess the high-side MOSFET's RON is a major factor. Could you provide me with the possible Max RON of the LM43602-Q1's high-side MOSFET? It's not written on the data sheet.
    -----------Min dropout is not a controlled parameter. The min off time and min frequency are controlled parameter. Min frequency is about 1/8 of the switching frequency. Please refer to datasheet curves for min dropout voltage under different condition. For the max Rdson, I would use 2* the typical value as an estimation.

    •In theory, the minimum input voltage that hits the tOFF-MIN restriction is estimated at 5.71 V when the VOUT is 5 V. However, Figure 12 of the data sheet shows the switching frequency starts to drop at around VIN = 6.0 V with IOUT = 1.5 A. What's wrong with my estimation?
    •The duty cycle when it hits the tOFF-MIN with FS = 500 kHz is 87.5% (= (2 µs - 250 ns (tOFF-MIN (Max)))/(2 µs) × 100%).
    •VIN under this condition is estimated at 5.714 V from the equation D = VOUT/VIN, here VIN = VOUT/D = (5 V)/(0.875).
    -----------The equation D=Vout/Vin is only true in an idea circuit calculation, which assumes there's no loss in the power conversion path. This is not true in reality. With 1.5A load, there are losses in the circuit and the duty cycle has to increase to compensate for the losses. That's why the voltage starts to drop at higher Vin with high load.

    •What are the recommended external component values for the following operating conditions?
    •FS = 500 kHz, VIN = 5.5 to 14.5 V, VOUT = 5 V, IOUT = 0 to 1.5 A
    ---------Please refer to the table or use Webench calculation.

    •If they are on the 10th column of Table 2 of the data sheet (FS = 500 kHz, VOUT = 5 V), can the COUT be smaller than the recommended 100 µF? Which performance will be degraded if the COUT is smaller than 100 µF?
    ---------The loop may have lower phase margin and under damped. Please use Webench simulation to check the desired Cout values. Note that ceramic caps will derate with bias voltage. Please use after derating values in the simulation or calculation.

    -Yang

    TI Wide Vin Buck Converter & Controller Applications Engineer

  • In reply to YangZhang:

    Hello Yang-san,

    Thank you for quick feedback and please let me ask a few more questions.

    YangZhang
    • Is the timing of switching mode changes (CCM to/from DCM in PWM and PWM to/from PFM in DCM) determined by the input voltage? I guess from the data sheet that it depends solely on the inductor current. I'd like just to confirm.

    ------------CCM to DCM transition is only determined by inductor current, as soon as the current valley reached zero ampere, it will be DCM. The transition to FPM depends on Vout offset. When the on time reached the min-on-time, or the internal Vcomp reached min value, the on-time of the DCM operation cannot reduce anymore, so Vout will start to rise a little, creating a positive offset. This small offset triggers PFM. But when Vin is too low, there's a chance that the peak current under this condition is too low to charge the Vout with a positive offset. That's why I said it may not enter PFM with low Vin.

    I guess in the case of low VIN, a positive slope of the inductor current becomes gentle and it will lead to a gentle rise of the VOUT, too, which will not trigger an immediate mode change to PFM. However, I suspect if the situation continues, the VOUT keeps rising gradually, and it may not be immediate but eventually it will trigger the mode change. I'm not sure how many switching cycles it takes but the mode will surely and finally switch to PFM. Is it correct?

    YangZhang
    • What will the LM43602-Q1's minimum drop-out voltage look like? If the idea is the same as LM53602-Q1, I guess the high-side MOSFET's RON is a major factor. Could you provide me with the possible Max RON of the LM43602-Q1's high-side MOSFET? It's not written on the data sheet.

    -----------Min dropout is not a controlled parameter. The min off time and min frequency are controlled parameter. Min frequency is about 1/8 of the switching frequency. Please refer to datasheet curves for min dropout voltage under different condition. For the max Rdson, I would use 2* the typical value as an estimation.

    Is it OK to consider the Max RON values of LM53602-Q1 (290 mΩ for high side and 125 mΩ for low side) can be used for the estimation? I think it's not far from the reality if the chip design around the switching MOSFETs (transistors and layout) is the same between LM43602-Q1 and LM53602-Q1.

    Best regards,
    Shinichi Yokota

  • In reply to Shinichi Yokota:

    I think it is ok to use the LM53603 Rdson as estimation. But the FET design is not exactly identical, they are similar.

    For low Vin PFM transition, yes when Vin is lower, the build up of the offset takes time, how many cycles depend on the operating condition. But when Vin is too low, at some point, the peak current is so low such that the positive charges is compensated out by the negative charges during the ringing right after the LS is turned off. Because of part to part variations in the min Vcomp, slope compensation and zero cross comparitor output, this behavior will happen at different Vin level. Lower frequency and relatively lower inductance help.

    -Yang

    TI Wide Vin Buck Converter & Controller Applications Engineer

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