This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

TPS62743: Excess power consumption when VIN < VOUT setpoint

Part Number: TPS62743
Other Parts Discussed in Thread: , TPS63051, TPS62120

Hello,

I selected TPS62743 for a design, and found when the PCBs came back that the devices consume much more power than expected once the microcontroller is in deep sleep. Eventually I isolated the problem to the TPS62743.

So I bought the TPS62743EVM-689 to see if the problem persists on TI’s evaluation platform. It does.

Scenario: Set TPS62743EVM-689 jumpers to 3.3V output. Apply 3.0V supply on the input. The only load on the output is a voltmeter (standard 10MΩ input impedance).

The TPS62743 IC draws 294 uA, as seen in the photo attached, about 800 times the typical datasheet figure. The excess current draw occurs all the way down to the UVLO at VIN of 2.0V. I also tried providing a somewhat higher load of 1MΩ (closer to what I expect in the application when asleep), which did not alleviate the problem.

I did test with the 3.6V input used in most of the datasheet measurements, and found things in good agreement with datasheet specifications, drawing about 0.9uA with the voltmeter attached to the output and 0.4uA with the output open-circuit. This helped me validate my test setup and meter calibration.

In my application, the TPS62743 is being powered from a rechargeable Lithium cell, so this behavior is undesirable as it renders the product effectively unable to sleep.

It seems that this regulator was designed with such a cell in mind, and there do not seem to be any cautions against using TPS62743 with VIN below the output set point in the data sheet. So I suspect this is not performing as intended.

Any advice?

 

  • Hi Josh,

    Yes, this is normal for most every buck converter. You can find an explanation here: www.ti.com/.../slyt412.pdf

    Do you need 3.3V for the MCU at all times or can you use a lower voltage in deep sleep? If so, you can use the VSEL pins to lower the voltage.

    If you need 3.3V, then you need a buck-boost converter to even get an output voltage this high when the battery is so low. TPS63051 can be used here.
  • Chris,

    Thanks for the prompt reply. I understand that most switching converters do have increased IQ at low input voltages, and if I had measured double or triple the typical current from the datasheet, I would have been satisfied and left you alone.

    I consider the behavior documented above to be extreme, well beyond any expectation I would take from reading the application note you linked, and worthy of (at a minimum) documentation by TI.

    This morning I tested a competitive part from Analog Devices, which has a variation of about 2.2x input current across the voltage range of a Lithium secondary cell. This is what I had expected from the TPS62743 when I designed it in.

     

    A lower output voltage in sleep would be fine, regrettably I did not provide means for the microcontroller to alter the VSEL pins on the PCBs I have in hand. If the documentation for TPS62743 had made notice of the extreme increase of input current when VIN < VOUT setpoint, I might have configured the circuit for that.

    What would be the ideal solution for me (lowest cost) is a pin-to-pin compatible regulator that does not do this, even if the overall efficiency were lower, so that I could rework the existing PCBs with a different chip in that position. But I did not find many compatible solutions in a search a few days ago (I think only the TPS627431, which probably has the same behavior).

    Yes, lesson learned on my part, buy eval kits to test key regulator parameters in the future before spending for PCB production, because data sheets even from quality vendors like TI are not all-encompassing. Thanks again for your consideration.

  • Hi Josh,

    Thanks for sharing your view and your data. We can consider adding some information around this topic to the D/S. Would what we have written on page 5 of the TPS62120 D/S have been helpful for this case?

    When reducing the Iq in this 100% mode state, there are tradeoffs (always) to be made. With any circuit, a lower bias current slows the response time. Have you already compared the input current and inductor current waveforms for each IC, when a short is placed on the output during operation in 100% mode? At 2.5Vin or 3Vin, for example, it may take too long to detect the short and turn off the high-side FET (which is fully on).
  • Good Morning Chris,

    Yes, the specification for Iactive, as shown in the TPS62120 datasheet would have been quite helpful. At a minimum it would have immediately given me a culprit to investigate rather than spending hours and hours with the application PCB looking at sensors and MCU peripherals that may have been left in active mode, etc. to draw the unexpected current.

    I would not call my qualification of the ADI part to be complete, and would not yet say I've decided to abandon the TI chip - I do like your suggestion of cutting the rail from 3.3V to 2.5V during sleep on a future PCB revision, pending some qualification with our MCU and sensors.

    I'm inclined to mark this resolved, since I do have a good understanding now of what is occurring. Hopefully the documentation team will decide to make this inclusion in a future data sheet revision.