• State
  • Locked Locked
  • Replies 5 replies
  • Subscribers 63 subscribers
  • Views 925 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

BQ78350-R1: Randon NACK when accessing HostFETControl register (0x2b)

Emanuel Wahlqvist
Prodigy 120 points
Part Number: BQ78350-R1
Other Parts Discussed in Thread: BQ78350

Hi,

We have a custom board where the SMBus communication with the BQ78350 works fine except for the HostFETControl register. Sometimes, the device stretches the clock for approx 25ms and the generates a NACK. Sometimes, on a read, it will stretch the clock and then respond with data 0xFFFF and PEC 0xFF.

The first issue seems to be experienced by other users as well, as described here:

Was there any conclusion, or do anyone have an advice why this particular register behaves like this?

Best regards

Emanuel W

  • 0
    TI__Guru 54715 points
    Hi Emanuel,
    I don't see a resolution in the other thread either. Can you quantify "sometimes" and is the read correlated to some other activity or prior command? Do you have a bus analyzer log or waveform?
  • 0 in reply to WM5295
    Prodigy 120 points

    Hi,

    Ofcourse, here are some details and pictures snapped with a Logic 8 analyzer. I also noted that the NACK problem occurs during writes, and 0xFFFF problem during reads. They both seem to be related to the SMBus timeout however. When testing this, I am only issuing the HostFETControl command (either read or write depending on what error to reproduce) every 5 seconds. If a command fails, retry attempts are issued immediately.

    Please note that the signal named PRECHG in my pictures is not the actual PRECHG signal but a debug trigger signal sent from our MCU when it detects an SMBus error. I didn't realize that I forgot to rename it until it was too late...

    NACK_1 and _2: Send unlock code 0x1197 OK
    NACK_3 and _4: Send 0x0000 to HostFetControl FAIL, NACK after 0x00
    NACK_4 and _5: Retry by sending unlock code 0x1197 FAIL, NACK after code MSB 0x11 (Logic interpretes the code MSB 0x11 as PEC and falsely reports a PEC error)
    NACK_6 and _7: Our MCU fails to detect the failed unlock and sends the HostFETControl command 0x0000 anyway, which succeeds (probably since a successfull unlock was performed earlier, well within the 4s window).

    0xFFFF_1 and _2: Read from HostFETControl that is responded to with data 0xFFFF and PEC 0xFF after approx 25ms of clock stretch
    0xFFFF_3 and _4: Retry read from HostFETControl responded with data 0x1717 and PEC 0x17
    0xFFFF_5 and _6: Second retry, successfull read of HostFETControl

    Please do not hesitate to ask if anymore data/samples are needed.

    Edit: I forgot to mention that the errors occur with the following frequency:

    NACK: Varies but between 10 and 30 pairs of unlock+command succeeds, then the error occurs 1 or a couple of times

    0xFFFF: After approx 30 reads there is 1 to 10 0xFFFF errors, then it works for approx 30 times again

    HostFetControl.zip

  • 0 in reply to Emanuel Wahlqvist
    Prodigy 120 points
    Hi,

    Any news on this topic?

    Best regards
    Emanuel W
  • 0 in reply to Emanuel Wahlqvist
    TI__Guru 54715 points
    Hi Emanuel,
    Thank you for the log file. This is in queue for review by a software expert. There is no known problem with the command or scheduled change. If the present behavior is problematic it would be best to avoid the operation. If the review finds another recommendation we will post it.
  • 0 in reply to WM5295
    Prodigy 120 points

    Hi,

    Ok, thanks for letting me know what is going on. We are implementing a workaround atm but I would be grateful for any updates.

    //Emanuel