Dear Team,
Can you please see customer question below and advise ?
U22 (on schematics) gets damaged on power up.
The power up sequence includes two stages:
- 3_3_ALW and 5V are turned on (light load – CPLD and some pull-up resistors)
- 3_3V switched (Q8) from 3_3_ALW (higher load – all other relevant components on board such as (CAVIUM CPU, Marvell ETH switch etc.) and some DC-DC are generated from 5V (DDRs and peripherals)
On the first power up stage, everything is OK.
The damage to U22 often occurs on the second power up stage (higher load) – I have measured up to 11A pick for ~60µsec thru L6.
Can you please review the attached schematics and advise ?
Best regards,
Nir.