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TPS7A84: ESR of Cout

Part Number: TPS7A84

Hi ,

just want to check below :

It seems there is no ESR requirement in TPS7A84 datasheet, so here are two questions:

1. why does some old LDO has ESR requirement? To my understanding, it's for loop design. But what does the TPS7A84 do to achieve no ESR requirement?

2. If ESR is large, will it affect the operation?

Thanks.

BRs

Given

  • Hi Given,

    You are correct that ESR will impact the stability of the LDO feedback loop as mentioned in the following article:

    www.ti.com/.../slyt187.pdf

    Too much or too little ESR will cause stability issues for the LDO.

    As the popularity of ceramic capacitors have increased, modern LDOs have been designed to be stable with low ESR.

    TPS7A84 (and the next generation TPS7A84A which removes the sequencing requirements) was designed to be stable with ceramic capacitors. The easiest way to determine if your application capacitor selection falls within the stable region is to perform load transient tests with the desired capacitors. Monitor the output voltage to determine if the transient response is acceptable. The following Application Report goes into more detail:

    www.ti.com/.../slva381b.pdf

    Very Respectfully,
    Ryan