BQ25504: Behavioral Questions

Hi John,

Sorry you are having difficulties. Bread-boarding this part with >1Meg resistors is not recommended due to the issues listed in datasheet section 11.1 Layout Guidelines. Also, the capacitor on VREF_SAMP must be very low leakage. Did you confirm the sizes of the resistors using this spreadsheet www.ti.com/.../sluraq1 I recommend ordering and modifying an EVM if possible to prevent these issues.

Regarding 1, if VSTOR=VIN_DC, the boost converter is not switching. The problem could be the large sized resistors or leakage on the VREF_SAMP capacitor mentioned above. Also, RDIV only has voltage every 64ms.

Regarding 2, the sequence and timing of connecting a battery is important. Per datasheet section 8.4 page 14

When no input source is attached, the VSTOR node should be discharged to ground before attaching a storage
element. Hot-plugging a storage element that is charged (e.g., the battery protector PFET is closed) and with the
VSTOR node more than 100 mV above ground results in the PFET between VSTOR and VBAT remaining off
until an input source is attached.

Assuming the voltages on VSTOR and VBAT are both below 100mV, when a charged storage element is
attached (i.e. hot-plugged) to VBAT, the IC.
1. first turns on the internal PFET between the VSTOR and VBAT pins for tBAT_HOT_PLUG (45ms) in order to charge VSTOR to VSTOR_CHGEN then turns off the PFET to prevent the battery from overdischarge,

Thank you for the quick response. 

Regarding #1, yes I did use that spreadsheet to help me appropriately size the resistors.

Regarding #2, I believe I understand the hot-plugging issue, but correct me if I'm wrong.  I understand that if I plug in a battery with VSTOR not being pulled to ground, and no VIN_DC source connected, the PFET between VBAT and VSTOR will stay off.  However, once I attach a VIN_DC source, the PFET should turn on and I should see VBAT at the VSTOR pin, correct?

If VSTOR is charged up to VSTOR_CHGEN (~1.8V) during the 45ms and the boost charger starts switching, then the PFET turns on.

Here's what I'm observing at this point:

I disconnect the solar cells from VIN_DC and ground the VSTOR pin to make sure it is fully brought down to 0V.  I've also put a 10M resistor from VSTOR to ground to keep it from floating back up.  I then plug in the 3.3V battery to VBAT, while watching both VRDIV and VSTOR with a scope.  When I plug in the battery, I get a 2mS pulse at 2.3V on VDIV and VSTOR stays at 0V, until I reconnect the solar cell to VIN_DC, at which point VSTOR tracks to the same voltage as VIN_DC.  After that 2mS pulse on VDIV, it just stays at 0V.  None of this seems to make sense according to the datasheet.  I'm attaching my schematic in case you can see anything wrong with it (note that I don't currently have U3 in my circuit).

Thanks again.

John,

If you are seeing a periodic pulse on VSTOR then the IC is trying charge. The d/s figures in the apps section can guide on how the waveforms should look. Can you disconnect the other two ICs from the VSTOR and VBAT and then attach the battery?

John,

Have you had a chance to remove the other two ICs and attach a battery?

Thank you for the follow up.  Yes, I removed the other two IC's and attached the battery.  As long as I disconnect VIN and bring VSTOR to 0V before attaching the battery, I do get the battery voltage at VSTOR now.  I'm still trying to think about how to make that sequence work in an actual product.

Now, however, when I attach a solar cell to VIN after going through that sequence, I am seeing strange waveforms at VIN.  I've been meaning to capture those and post them for your feedback.  I'll try to do that soon.  

I am attaching some scope shots where the yellow trace is VRDIV and the blue trace is VIN_DC with a solar cell attached.  The first image is with no light on the cell.

These next images are with a good amount of light on the cells, enough that I would expect a constant DC voltage out of them, but maybe you can help me make sense out of what I'm seeing here?  When disconnected from the circuit in the same lighting conditions I get the full specified VOC from the cell.

Hi Jeff, just wondering if you've had a chance to take a look at these scope shots?

Thanks.

HI John,

I apologize for the delay. The first RDIV pulse should be the real time VSTOR measurement and the second should be 2/3 of the VBAT_OV setting. Some of your plots show this, some do not. Also, VIN_DC should be VOC for a brief time, with the MPP circuit is sampling the VOC voltage, but then VMPP for the remainder of the time, while the boost converter is operating. I can't explain whey some of your plots only show the 2nd pulse but we ask a colleague. The capacitor on VREF_SAMP needs to be low leakage and have no solder flux residue creating a parasitic resistor (same for other resistors in the circuit). You will not be able to use a normal 10Meg scope probe to measure the voltage on VREF_SAMP because even that will collapse it. Can you try replacing that capacitor after carefully cleaning the board of solder flux?

I'm currently using a breadboarded circuit with wirewrap connections.  I had no idea this circuit is so sensitive to stray capacitances, etc., so it may be possible that I'm seeing this behavior due to parasitics inherent to the wirewrap board.  I've ordered some actual prototype boards to arrive in about a week to see what difference that makes.

If I can't probe some of the signals with a 10Meg scope probe, what is the preferred method for taking measurements?