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TPS2120: EVM vs. Datasheet quesitons

Madeleine Roche
Prodigy 100 points
Part Number: TPS2120

Hello, I am trying to use the TPS2120 as an ORing select between 5V terminal power and 5V usb power, where 5V terminal power is always preferred unless not present. I am following the evm reference schematic for the 5V jumper option on both VIN1 (5V terminal power) and VIN2 (5V usb power) and have some questions about the datasheet vs what I see in the schematic.

Question 1:

It looks like ST pin is an open-drain output on the TPS2120, is this correct? If so, you mention some maximum pull-up resistances for ST pin are 6k typical and 20k maximum, I'm assuming these are external pull-ups. But, in the evm schematic for the TPS2120 when ST pin is pulled up to VIN1 5V the total pull-up resistance is 10.7k+18.2k= 28.9k. Is this a discrepancy between datasheet and schematic? Please clarify this. 

Also, is the purpose of the grounding option for the ST pin for when it is not used?

Question 2:

Section 9.4 Table 2 of the datasheet says that if PR1 is pulled high and both inputs are valid then IN1 is used. What is the range for a high voltage? Logic levels are not mentioned anywhere in the datasheet.

Question 3:

The SEL pin on TPS2120 does not have much information about its behavior and is not included in Section 9.4 Table 2. It says active low to enable IN1, does this mean it will always select IN1 even if IN1 is not valid or present? What happens when I tie the pin to PR1, like the jumper option on the reference schematic? I will probably tie this pin to a GPIO but would like more detail on its use case behavior. 

I'm starting to feel this part is too complex for what I am trying to do, but I am looking for an ORing select solution without any diode drops and with reverse current protection. 

  • 0
    TI__Genius 10855 points

    Hi Madeleine, 

    Thanks for reaching out on E2E! I appreciate the detailed descriptions, the TPS2120 can be a complicated device and we are working to simplify the datasheet for final release. In the meantime, let me address each of your questions individually and try to clarify a few points.

    First, to reiterate your configuration, you have two 5V inputs, with terminal power getting priority. Whenever terminal power gets removed, you would like the device to switchover to USB power. If terminal power is plugged back in, the device should switch back to terminal power. Is my understanding correct?

    Question 1: I will check with the designer regarding the maximum resistance on the ST pin. If you are not using the ST pin, you can ground the pin. 

    Question 2+3: I'll explain questions 2 and 3 together with a quick overview of the device, and how I suggest you configure the TPS2120. 

    I suggest you configure the TPS2120 for VREF configuration. If the voltage on PR1 is higher than an internal VREF voltage (~1.06V), the device will prioritize IN1 as the output. If the voltage on PR1 drops below VREF, then the device will switchover to IN2 if IN2 has a valid input voltage. In this example, I would recommend connecting terminal power to PR1 via a resistor divider. Therefore, if the voltage on terminal power (IN1) drops, the voltage on PR1 will drop and the device will switchover to USB Power (IN2).

    The SEL pin allows you to override the configuration above, and manually switch to IN2. Section 9.4, Table 2 provides SEL information in column 1. If SEL is above VREF (~1.06V) and IN2 presents a valid voltage, then the output will be IN2. Therefore, for your configuration, if you would like to manually switch to IN2, you can provide voltage on the SEL pin. If you want IN1 to provide VOUT, then keep SEL below VREF. 

    I hope this helps clarify a few points. Please let me know if you have any questions. As I mentioned earlier, we are currently updating the datasheet so this feedback is very helpful for us. 

    For reference, may I ask what application are you consider the TPS2120 for? What is your expected timeline?

    Thank you,

    Arthur Huang

  • 0 in reply to Alpha H
    Prodigy 100 points

    Arthur Thank you for your reply!

    I don't have much detail on the application other than we are trying to power a high current, low voltage microprocessor with a handful of peripheral devices. At times we may want to power the device through a terminal and at others through USB port. 

    Your answers are more clear than the datasheet is. I will follow your logic to implement the design. I still have some questions to clear up about your reply and the evm schematic. 

    Question 1, PR1 pin voltage:

    In order to prioritize IN1, tie PR1 to VIN1 through a resistor divider to ensure PR1>VREF(~1.06V). In the EVM PR1 is connected high through a resistor divider that produces ~1.08V at the PR1 pin, which is very close to the VREF voltage and with tolerances may be higher or lower at times. Why choose that voltage divider? I would produce a higher voltage than 1.08V on PR1 pin to ensure priority on VIN1 supply.

    Question 2, OV pin voltages:

    According to the datasheet OV pin voltage is compared to VREF. I calculated voltages on OV1 and OV2 pin on evm design to be ~0.88V. Am I correct in assuming that if OV voltage rises to above VREF then the device will switch inputs or shut off? A more concrete example of OV calculation and application would be helpful in the datasheet. 

    Question 3, ST pin pull-up voltage:


    In the EVM ST pin has the option of being pulled up to VIN1. I would imagine if this pin is essentially an open-drain power good pin, that it should be pulled up to VOUT and not VIN1. Can you clarify the functionality of this pin? Table 2 in section 9.4 says it is high if IN1 is output and low if IN2 is output, this is confusing because as open-drain I would expect to see it either HI-Z (high output if tied high) or go Low. When is the gate of ST fet turned on? 

    Thanks again for clarifying these questions, it is a huge help.

    Madeleine

  • 0 in reply to Madeleine Roche
    TI__Genius 10855 points

    Hi Madeleine, 

    Thanks for the feedback, I'm glad my description cleared a few things up. Please find the answers to your questions below:

    1: PR1 pin voltage:

    You are correct, the voltage divider is set really close to the 1.06V VREF threshold. This ensures a fast response time if IN1 were to dip. In this case, if IN1 drops below ~4.9V, then the device will switchover to IN2. Due to resistor tolerances, you are right, the voltage could be slightly inaccurate on the PR1 pin. Since the device is an evaluation module, you could always solder different resistor values and play around with the threshold. 

    2: OVx pin voltages:

    Good question, again we are updating the datasheet and releasing an additional TPS212x design that provides a walkthrough of these calculations. You are correct in your calculations, if the voltage on the OVx pin reaches VREF then the device will switch inputs. Therefore, for an example calculation, here is the 5V resistor calculation:

    1.06V = VIN * (5k / (5k + 23.7k))  = 6.08V

    Therefore, on the EVM if the voltage on the input channel exceeds 6.08V, then an overvoltage condition exists on that channel.

    3: ST pin pull-up voltage:

    The ST pin functionality is very similar to a PG pin, but it provides an additional function for the device: adjustable hysteresis. You are correct in the pin being high if IN1 is output and low if IN2 is output. However, when the ST pin is pulled low, the 10.7k resistor slightly lowers the voltage on the PR1 pin, since it acts as a pull-down. This ensures that the device won't accidentally switch back between IN1 and IN2 repeatedly unless the voltage on IN1 is clearly back to a nominal level.

    Example: If I have two 12V inputs, and I want the device to switchover at 11.7V from IN1 to IN2. If the voltage on IN1 is at 11.69V, but noise is introduced into the system, say 50mV ripple, then the device would keep switching between IN1 and IN2 as the voltage on PR1 goes slightly higher and lower than VREF. By including the adjustable hysteresis, the voltage on PR1 would be pulled lower than VREF while IN2 is the output. In this specific example, I have a 1MΩ pulldown resistor, so IN1 would have to rise back up to ~11.8V for the device to switch back to IN1.

    I will be releasing our design shortly that highlights this specific example above, it also explains a lot of the features mentioned above. I hope this explanation helps. If you would like more information regarding this design, feel free to email me at a-huang@ti.com

    Thanks,

    Arthur Huang