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TPS563219A: Startup problems with non-A version

Part Number: TPS563219A

Hello community,

we have designed and built hardware with a TPS563219A PMIC voltage regulator.

For the last production batch (1000 boards) the TPS563219A was not available through our distributors, so based on the datasheet and
https://e2e.ti.com/support/power_management/non-isolated_dcdc/f/196/t/561563?TPS563219A-TPS563219A-vs-TPS563219
we used TPS563219(non-A) as a direct replacement. We are running into some serious problems with this part, see below.
After replacing the non-A version with the A version on 2 faulty boards, everything worked as intended.

Circuit

Our circuit is basically the reference design:

The main difference is a bigger inductor, in our production batch 4.7uH instead of 3.3uH were used.
Possible/recommended values in the datasheet Table 2 "recommended component values" list the values used, and the inductor is within
the specifications for current/peak current.so I dont see a problem here.

Layout

The board is a 2-layer single-side PCB.


Behaviour TPS563219(non-A)

When the TPS563219(non-A) is used, the output of the TPS seems to remain disabled.

On the following screenshots, the blue trace shows the input voltage.
The yellow traces show whatis named above the screenshot.

Output Voltage - faulty

 device internal power supply

laboratory power supply, zoomed in on first peak.

Output Voltage - stable

Sometimes, on some boards, the output voltage reaches a stable state.
device internal power supply

Soft Start Voltage - faulty

time constant for Soft Start charge as expected, but discharging repeatedly.
laboratory power supply.

Switching output voltage - faulty

laboratory power supply.
Different resolutions on time axis.

Behaviour TPS563219A

Replacing the TPS563219 with TPS563219A fixed the problem.
Laboratory Power Supply.

Questions

  1. What are the differences between the A and non-A version (including minor changes)?
  2. Are there any values in the system that are on the edge of allowed values (with the A version being okay with these and the non-A version reacting less forgiving?)
  3. Do you see potential problems in the routing/layout?
  4. Is the behaviour for the non-A version expected for some known faults? What is the reason for this behaviour?
  5. How can we know we will not run into similar problems with the A version?

Thanks a lot,
Lars Heinrichs

  • Hi Heinrichs,

    From the layout, there are some traces under inductor and IC, it is very easy to introduce noise, the layout is not good. You can refer to the user's guide to design the layout.

    A version has stronger anti-interference ability than non-A version. We recommend you use A version.

    Shawn
  • Hello Shawn,

    thank you for your reply.
    I agree that putting traces in locations with fast switching of high currents is a bad idea, but I think (for the following reasons) that the layout might be okay.
    Please help me understand what parts of the layout are to be considered critical and why (as I want to understand).

    • Traces under (fully shielded) Inductor
      • Power Good Output: This is an output that is actively driven by the IC -> okay ?

    • Traces under IC (left to right)
      • Feedback Pin:
        • Trace->IC Interference:low voltage, currents and slow transients -> okay ?
        • For IC->trace: Very short trace, on the opposite side of the ICs power output -> okay ?

      • 12V:
        • Trace->IC: no fast transients -> okay ?
        • IC->Trace: powerful supply, lots of capacity ->okay ?
      • Switching output to CAP:
        • Trace->IC: the trace is basically right next to the devices output and should be located under the devices output section. -> okay ?
        • IC->Trace: Probably the is the strongest signal in the system (transients, currents) so shouldnt be sensitive to interference -> okay ?

    Thank you,

    Lars Heinrichs

  • Hi,

    I can't give you a definite answer whether it would be okay if the trace is under inductor or IC, it is determined by many factors. Maybe it is okay for this application, but it has bad affect to other application. But we don't recommend you to design the layout like that. It is easier to introduce noise, We don't know what impact this noise has on the system, it depends on the specific application.

    Shawn
  • Hi,

    At lest, the layout of feedback circuit should be good. I recommend you to optimize the layout to solve this issue. And It is the best to choose A version, because its anti-interference ability is better.

    Shawn