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TPS7A52-Q1: Is Pin FMEA report available for this LDO?

Part Number: TPS7A52-Q1

Hi,

Is pin FMEA (application report) available for TPS7A52-Q1 LDO?

Thank you.

Regards,

AJ.

  • Hi AJ,

    Short to Adjacent
    OUT NC No impact
    NC FB No impact
    FB PG If Vpg is above 3.6 V the Absolute Maximum Rating on NR/SS will be exceeded and the LDO may be damaged.  Otherwise the reference voltage will be equal to Vpg and the output voltage will be scaled accordingly
    PG DNC This may damage the device
    DNC NC Unless NC is floating, this may damage the device.  If NC is floating, this is the correct state for this pin.
    NC GND This will help to increase the thermal performance of the LDO by helping to maximize the GND copper local to the LDO
    NC BIAS No impact
    BIAS NR/SS If Vbias is above 3.6 V the Absolute Maximum Rating on NR/SS will be exceeded and the LDO may be damaged.  Otherwise the reference voltage will be equal to Vbias and the output voltage will be scaled accordingly
    NR/SS EN If Ven is above 3.6 V the Absolute Maximum Rating on NR/SS will be exceeded and the LDO may be damaged.  Otherwise the reference voltage will be equal to Ven and the output voltage will be scaled accordingly
    EN IN The LDO will always be enabled when Vin is above the UVLO and Vih(en) thresholds
    IN GND The LDO will not have an output
    GND OUT The LDO will enter current limit and eventually go into thermal shutdown.
    Short to GND
    OUT GND The LDO will enter current limit and eventually go into thermal shutdown.
    NC GND This will help to increase the thermal performance of the LDO by helping to maximize the GND copper local to the LDO
    FB GND Vout will be equal to Vin
    PG GND PG will not go logic high
    DNC GND This may damage the device
    BIAS GND If Vin is less than 2.2 V, the output may be in dropout.  If Vin is greater than 2.2 V, there is no adverse effect.
    NR/SS GND The LDO interal reference is tied to this pin, if shorted, the LDO will not have an output.
    EN GND The LDO will not have an output
    IN GND The LDO will not have an output
    Float
    OUT The LDO load will not be powered
    NC No impact
    FB Vout will vary between GND and Vin
    PG PG will not go logic high
    DNC This is the correct state for this pin
    GND This is the reference for all internal voltages.  If floating, Vout will vary between GND and Vin
    BIAS If Vin is less than 2.2 V, the output may be in dropout.  If Vin is greater than 2.2 V, there is no adverse effect.
    NR/SS The external noise reduction capacitor will not be connected; therefore, the reference will not be filtered and there will be no softstart.
    EN The LDO may or may not be enabled.  This pin should be driven at all times
    IN The LDO will not have an output

    Very Respectfully,

    Ryan

  • Thank you very much Ryan.