LMZ20502: SILT

Hi Marc,

I've linked a brochure of the design of the uSIP package that LMZ20502 is using. In the "Board Layout" section the bullet points state the following:

• Using Ni/AU surface finish, gold thickness should be less than 0.5mm to avoid reduction in thermal fatigue performance.
• Best solder stencil performance is achieved using laser cut stencils with electro-polishing.

Hope this answers your questions.

Regards,

Jimmy 

Hi Jimmy,
Are you sure that in Ni/Au surface finish, gold thickness should be less than 0.5mm but rather 0.5µm? 0.5mm seems very thick.
Regards,
Marc

Hi Jimmy,
Sorry but my request is about component lead finish. Your response corresponds to PCB finish.
I need to know process of gold deposit is used (electrolytical or chemical) and what thickness of gold is deposited on the terminations of this component.
Regards.
Marc JACQUOT

Hi Marc,

Let me get in contact with the design team about the component lead finish for this device. I'll let you know as soon as I get more information.

Regards,
Jimmy

Hi Marc,

I was informed that this device is in the ENIG surface plating on the "mini-PCB". The module is a uSIP with the device embedded in the "mini-PCB" and the exposed inductor on top.

Regards,
Jimmy

Hi Jimmy,

thanks for your response.

I have the same request concerning the components LMH0387SL serie please.

Do you tell me what process of gold deposit is used (electrolytic or chemical) and what thickness of gold is deposited on the terminations of this component knowing that they are finished NiAu and not NiAuPd.

Thank you by advance.

Regards.

Marc