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WEBENCH® Tools/TPS65261-1: Question about phase margin result for WEBENCH

Charles Jeon
Expert 2975 points
Part Number: TPS65261-1
Other Parts Discussed in Thread: TPS65261

Tool/software: WEBENCH® Design Tools

Hi team.

I did simulation for TPS65261-1 via WEBENCH.

However, the bode plot result of Vout3 was output in a different form than normal.

It is normal?

If it is no, how does this affect the system?

Please analyze this result.

The above is the result when 1.5uH is applied to Lout.

Even when applying 2.2uH to Lout, similar results are obtained.

Result data(1.5uH) : TPS65261-1_1.5MHz_1.5uF.pptx

Result data(2.2uH) : 6428.TPS65261-1_1.5MHz_2.2uF.pdf

  • 0
    TI__Mastermind 19080 points

    Hi Charles,

    It looks good to me. You have a good bandwidth and phase margin. What's your concern?

    A soft reminder is, please use capacitor with small value for Cff(Ccomp3 in the figure), e.g., 47pF, 68pF.

    This device employs peak current control mode. In PCM, the inductor is modeled as a voltage controlled current source, so changing the inductance won't change the loop characteristic.

    Regards,

    Hao

  • 0 in reply to Sam(MPAA) Zhang
    Expert 2975 points
    Hi Hao.
    The phase graph does not fall below 0deg and the gain margin is not visible.
    Does this affect your system?
    Thank you.
  • 0 in reply to Charles Jeon
    TI__Mastermind 19080 points
    Hi Charles,

    Yes, you are right. Gain margin can't be read out on that figure. I think there is not a problem. Judging from your simulation, the design looks good.
    Actually, the WEBENCH model may have limited accuracy on higher frequency. I mean, even if you can read it out, it may be quite different with real case...

    Regards,
    Hao