LP3991TL-1.2EV: EN Pin, (Vin + 3) < 6.5V - What is the maximum voltage?

stomp

Genius 4615 points

Part Number: LP3991TL-1.2EV

Hi,

I'm using LP3991TL-1.2 in a FPGA power design. The device is powered from 1.8V

I am using TIDC883 as the reference design, which is for a 8W Xilinx FPGA power supply solution.

The LP3991TL-1.2 has its enable pin driven from a LM3880 power sequencer driven from 5V with 5V pull-up resistors.

Is it safe to bring the EN pin to 5.0V when the device is powered from 1.8V. If not does this mean there is a mistake on the TI reference design?

Thanks

Stomp!

over 5 years ago

0 Gerard Copeland over 5 years ago

TI__Genius 10200 points

Hi Stomp,

The maximum rated EN pin voltage is Vin + 0.3 V or 6.5 V, whichever is smaller. This pin should not enabled with 5 V if the input voltage is only 1.8 V. The maximum logic high EN voltage would be 2.1 V for these operating conditions. Exceeding this rating could damage or degrade the reliability of the device.

Thanks,
Gerard

0 stomp over 5 years ago in reply to Gerard Copeland

Genius 4615 points

Thanks very much Gerard.

Looks like the TI reference design has a few issues issues that need correcting.

Cheers

Stomp!.

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LP3991TL-1.2EV: EN Pin, (Vin + 3) < 6.5V - What is the maximum voltage?