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LM5060: Voffset of VDS comparator -> 7mV or 0.7mV accuracy?

Beat Jetzer
Prodigy 80 points
Part Number: LM5060

On page 5 of the datasheet, there is a accuracy of 7mV @Tj=-40..+175°C

On page 9, Figure 14 shows the same issue, but there is an accuracy of 0.2..-0.4mV @Tj=-40..+175°C

What is correct?

I did a request a few days ago over the "Submit Documentation Feedback" link of the datasheet, but didn't get any response yet.

  • 0
    TI__Guru* 95891 points
    Hi Beat Jetzer,

    Figure 14 takes care of only temperature variation where as data shown in the Electrical Characteristics table (Page 5) includes silicon process variation also. So, for design purpose, you have to consider worst case values from Page 5.

    Best Regards,
    Rakesh
  • 0 in reply to Rakesh
    Prodigy 80 points

    Hi Rakesh,

    So the temperature variation figure seems to be a bit needless..

    We want to operate the LM5060 in a temperature range of -20..+70°C. +/-7mV accuracy leads to 5A accurracy (other errors not included) for our 1.4mOhm Rdson FET.  We're discussing about using two FET's in parallel (less power loss on the FETs) , but that would lead to an accuracy of 10A because of the Vds error (that's a lot!).

    An error band figure over temperature would help to reduce the calculated error (range of -20..+70°C). I'll give some information about accuracy on my second opened task about Iratio accuracy here: https://e2e.ti.com/support/power-management/f/196/p/764018/2824033#2824033

    Best regards,

    Beat

  • 0 in reply to Beat Jetzer
    TI__Guru* 95891 points
    Hi Beat Jetzer,

    Unfortunately, we don't have data on Vds offset w.r.t temperature. I will followup on your other thread as both are related.
    Please close this thread as resolved.

    Best Regards,
    Rakesh