TINA/Spice/LM5085: Gate Drive MAX current. Spec. versus model

Hello Aidan,

I have forwarded your questions to the product expert, and he will follow up with you.

Best Regards,
Katelyn

Thanks.....

Q1&2, understood peak, but the model delivers the same 150mA peak (at the point of switching) and also 150mA DC. So I think this cant be correct.

Q3. Decays towards Vcc I assume. NOT towards GND. Also the model does neither. So please be 100% clear as I am considering using Vcc as a ref for an external follower to drive the bottom end of this PP pair. I need to know what it does when the device is switched off via RT.

Q4, Its not too suitable to use a sync controller. The problem is that this is a battery charger, My supply Vin will never be higher than the absolute max charge voltage of the battery and I must charge to the same voltage as Vin. If I use a sync controller, I will always loose a few volts between Input to Output (quite a significant voltage in fact). I trawled your many sync controller and with Vin @ 60V none can deliver more than 57V output. I do not want the complexity of a boost controller or LLC, if I manage the power well with the LM5085, it can be quite simple.. That has been my thinking anyway.

However the most important point of my question is this apparent current limit that I see on the GATE pin of the LM5085 model. I never see any peak current that comes close to the spec sheet and its making a huge difference to efficiency.
Aidan

Thanks Tim,

Yeah, actually my question about the Vcc output going to Vin was pretty dumb actually. After all if it did not pull towards Vin you will kill PFETs as soon as Vin was above 20V or so. Duuuh.

Actually I looked at the LM5145 but still I came back to the LM5085. The lack of compensation issues and simplicity makes it attractive as I need to modify the design already to be CC only and not CCCV. I have studied your application note, (AN-2157), about using the current control feature within the LM5085, but actually this proves to have less than ideal operating characteristics in my scenario. The over current control in the LM5085 causes the IC to enter a backoff mode (forced off-time). This drives the frequency of the converter down and makes it difficult to control the operating frequency and efficiency if this is used as a primary regulation method.
Instead I am trying, and it seems to work quite well (again in sim), the addition of an INA169 high side current monitor, then using the output from this to drive the FB pin of the LM5085. In this way the output current is controlled much more smoothly and operating frequency is predictable and changes proportionally with the difference between Vin and Vout.

Still you are correct about the flyback current. I'm dumping over 2.3W in the current design. I got this down (sim of course) to 1.75W by using FERD rectifiers. Never tried them in this position, but I don't currently know of any reason why they are not a good option. Yet still HOT!
Truth is the same is true for the PFET also. I am trying to get below 5W at full load in the PFET. But with the LM5085 (model) driving the FET, it's over 22W in the PFET Ouch!

Yes its a lot of heat and maybe finally the sync approach might be better, however I say again drop out voltage is critical in my design. This drags me kicking and screaming back to the LM5085.

If I use a simple PP augmentation and drive with BJTs at around 1.5A peak, the PFET power drops to 3-4W. Workable.

However.........

I again can confirm that I can not get more than 150mA output current from the IC in simulation. The datasheet says 1.5A peak. Where is it?

Aidan

Hi Aidan,

Thanks for the feedback. We have implemented the Gate Driver Output Source/Sink currents properly. Below is the steady state simulation result of released test bench. To test peak source/sink Gate currents, we have connected additional 20nF capacitor at Gate node to Ground.

Simulation Result: 

[NOTE: I(U1:PGATE) and V(GATE) are the current through and voltage at PGATE pin respectively].

Also, could you please attach your test schematic here? This will help us to analyse the issue regarding VCC pin current.

Thanks & Regards,

Arpan Gupta 

Hi Arpan,

Thanks for getting back to me. Hmmmm, this is not what I am seeing. Whats going on I wonder. I have also tried adding 20nF and more to the gate just to try and drag something out of the gate pin. Nothing works. 150mA and that's it.

I have attached my schematic. Please excuse the slow sim times, but much else is going on here. Still you will see around the LM5085 pin that I have implemented a BJT PP pair to get the currents I need. 

For your purposes I have quickly taken the BJTs out of the equation and also added 20nF of extra gate capacitance on the 5085 gate pin.

Take a look at G_5085_I and you will witness the lack of drive current. If you instead drive the BJTs with the 5085 you will see reasonable gate currents.

All the best

Aidan

LM5085_Charge_Current_Limiter.tsc

LM5085_Charge_Current_Limiter_with_TINA_model.tscExtra,

As a side note, but one that is still unanswered. The file I attached originally uses a slightly modified version of your unencrypted PSpice model. The reason for the modification is that the current limiting does not work when using higher input voltages to the IC. You will find my comments on this and comments from others who also seem to see the same problem. I made a small SPICE mod. to workaround this.

However in my final design this was not critical, as I ended up using n external current monitor, therfore my macro mods where not so important.

However to make sure that the behaviour I am seeing regarding gate current is not related. I have attached another schematic with the encrypted TINA Transient model included.

As you will see. Same issue. 150mA drive current and no more.

again all the best

Aidan

Hi Aidan,

Gate driver output Source/Sink currents are not modelled in the model you are currently using. Therefore, you will not be able to see proper results. Now we have implemented Gate driver output Source/Sink currents in the model. We have shared the updated simulation result with you on 07FEB2019. The updated behaviour will reflect after we release the updated model to TI website.

Currently we are resolving the current limit issue for higher input voltage cases. You will find updates on this at below thread.

https://e2e.ti.com/support/power-management/f/196/p/755044/2854404#2854404

We are trying to resolve the current limit issue as soon as possible and targeting to release the final updated model (with both bugs fixed) by end of this month.

Thanks & Regards,
Arpan Gupta

Thanks Arpan,

Good news. I have been now days working on the gate drive issues, with the assumption the IC will not deliver enough drive even if the model is realistic. However I think from the thermal perspective of the switching FET, so long as it can deliver around 800-900mA and do that through the Miller plateau, I will keep power loss under control. If I'm not mistaken the IC is likely to be better than using BJTs but your block diagram of the LM5085 does not show if the output stage is MOSFET based or not. Even using high gain NPN in my buffer, I still fall short when driving through the flat and this is where I'm generating most of the heat....of course.

So, I'm glad your model is coming to success. Perhaps you can tell me if the IC actually uses MOSFETs in its output stage? Also is there any possibility, perhaps by sharing with me directly via email, that I can test your current updated model in my simulation. I realise it has not yet been released, but still...if I can be more confident of its behaviour, I can move on and begin laying out the PCB. Otherwise, you have me waiting until I have a reasonable idea if I truly need a gate drive buffer or not. So long as the model works at higher Vin, I'm not so concerned if its current limiting is not accurate, as in fact, I only implement overcurrent protection as a safety feature, as you will see from my schematic, the primary loop control is current based using an external high side current monitor. So when the circuit is operating normally the LM5085's current control is not actually triggered.

Also, I will need to carefully consider the extra power dissipation in the LM5085 if it drives the gate directly. Although I'm not too worried at the moment a quick calculation suggests around 650mW from the IC. Not to be ignored and clearly I need to understand this before I lay out the PCB. So anything to help me move along would be a great assistance.

All the best

Aidan

Thanks Arpan,
So, you indicated at the end of the month. Can you tell me if this is actually still true. It would be great to test with an updated model.
Thanks
Aidan