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LM5060: clarifying questions

Part Number: LM5060

Team, 

Can you please help answer my customer's questions:

  • Confirming D4 should be sized for a transient load current of 80mA, which would only occur during fault and for a short period as the gate is discharged.  What is the required reverse voltage rating of the diode?
  • Please confirm the purpose of Q3, D5, and R2.  I saw in the datasheet it was mentioned they protect Q2 from VGS damage during reverse polarity, but I am having trouble visualizing the path that creates this issue.

  • Hi Viktorija,

    Thanks for reaching out!
    I will reply to the questions soon...

    Best Regards,
    Rakesh
  • Hi Viktorija,

    Apologies for the delay.

    When Vin goes towards negative polarity, the LM5060 turns-OFF the GATE due to UVLO or POR. The common source point will be at -ve potential through the body diode of Q1. If the reverse polarity voltage exceeds Vgs rating of Q2. It will damage the Q2.

    The components Q3, D5, and R2 protects Q2 and works as follows..

    Q3 gets forward biased -> shorts Vgs of Q2

    D5 clamps the base-emitter voltage for Q3

    R2 limits the current through the path.

    The reverse voltage rating of D4 should be greater than the Vin reverse polarity voltage.

    Best Regards,

    Rakesh

  • Hi Rakesh,

    Thanks for the information above.  Please confirm the correctness of the following statements:

    1) D4 should be sized for a transient load current of 80mA, which would only occur during fault and for a short period as the gate is discharged. 

    2) D5 reverse voltage rating should be greater than the Vin reverse polarity voltage.

    3) D5 should be sized based on Vin(max) and R2 value which sets current through D5.  This would be consumed during normal operation.

    4) Q3 Vce rating should be greater than the Vin reverse polarity voltage.

    5) Q3 Vec rating should be greater than Vgate(max) of LM5060.

    6) R2 value should be chosen to maintain Ic/Ib > 10, as a guideline.

    Question:

    1) What is exepcted Ic of Q3?

    Best Regards,

    Bryan DeMaster

  • Hi Bryan,

    1) D4 should be sized for a transient load current of 80mA, which would only occur during fault and for a short period as the gate is discharged.
    A) Correct. D4 should support current of 80mA and the reverse voltage rating of D4 should be greater than the Vin reverse polarity voltage.

    2) D5 reverse voltage rating should be greater than the Vin reverse polarity voltage.
    A) Yes

    3) D5 should be sized based on Vin(max) and R2 value which sets current through D5. This would be consumed during normal operation.
    A) Correct. This structure gets forward biased in normal operation

    4) Q3 Vce rating should be greater than the Vin reverse polarity voltage.
    A) Yes

    5) Q3 Vec rating should be greater than Vgate(max) of LM5060.
    A) Right

    6) R2 value should be chosen to maintain Ic/Ib > 10, as a guideline. What is expected Ic of Q3?
    A) Suggest to maintain 50~100mA of Ic.


    Best Regards,
    Rakesh
  • Hi Rakesh,

    Clarifying questions from #6. 

    Where is the 50~100mA of Ic coming from for Q3? 

    What limits that current and what is the path where that current is being consumed?

    Assume this current is only consumed in reverse polarity condition?

    Best regards,

    Bryan

  • Hi Bryan,

    In steady state reverse polarity condition there will not be any current flow. The typical value of 50-100mA is coming from transient GATE discharge during Vin transients (Vin fast changing from +ve to -ve). This will be of very short interval (few us).

    Best Regards,
    Rakesh
  • Hi Bryan,

    Can you share the system requirements and application use case details. do you have any further questions ?

    Best Regards,
    Rakesh
  • Hi Rakesh,

    System requirements are to operate from 8-32V and minimum of 10 Amps continuous current draw.  The application use is for both reverse polarity protection as well as provide an "E-Stop" type function to shut power down to downstream components.

    I do have a couple additional questions:

    1) If not using UVLO, the datasheet states to connect to VIN.  I would like to design-protect for potentially using UVLO in the future.  Do I populate with 0 ohm resistor or do I need to provide some resistance between power and UVLO pin for reverse polarity condition?  Also, while the datasheet states tying to VIN, Figure 41 shows two "VIN" names...one is the power net coming in while the other is the LM5060 pin itself.  Figure 41 shows connected to VIN (power net).  Is this correct?

    2) Same type of question for OVP.

    Thanks,
    Bryan

  • Hi Bryan,

    Thanks for the details.
    You can connect with 0 ohm resistor to device VIN but if you want to precisely monitor "power net coming in = actual input voltage without diode drop" then connect with resistor of 50k to 100k to the "power net coming in".
    something like Figure -16 in www.ti.com/.../tiduc41a.pdf

    Best Regards,
    Rakesh
  • Hi Bryan,

    If you do not have any further questions, please close this thread as resolved.

    Best Regards,
    Rakesh