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Part Number: TPS3431
With EN and SET1 inputs high, I let the watchdog time out, so WDOn asserts low, and if I did nothing else WDOn will stay low for the reset delay tRST of 200 ms (typ).
However if say 10 ms after WDOn went low I forced the SET1 input low (which disables the watchdog), then will WDOn go high immediately when SET1 goes low? Or will WDOn still stay low for remainder of the tRST delay of 200 ms?
Setup time for Set1 pin is 150us. So WDOn will respond to Set1 after 150us.
The SET1 pin can enable and disable the watchdog timer and should be used when disabling the watchdogtimer for longer than one watchdog reset cycle. If SET1 is set to GND, the watchdog timer is disabled and WDI isignored. If the watchdog timer is disabled, drive the WDI pin to either GND or VDD to ensure that there is noincrease in IDD. When SET1 is logic high, the watchdog operates normally. The SET1 pin can be changeddynamically; however, if the watchdog is going from disabled to enabled there is a 150 μs setup time where thewatchdog does not respond to changes on WDI, as shown in Figure 9. Note: disabling using SET1 pin causes adelay defined by the fixed 150-us setup time when enabling again.
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