TPS65320D-Q1: TPS65320D-Q1

Eli,
Below is a description of the dropout mode of the TPS65320D-Q1. Theoretically this device is capable of 99% duty cycle, and will turn on the buck continuously except for the refresh clock cycle, when the input voltage goes below the described dropout threshold. This means that the output will track the input within a few 10's of milli-volts if you go below the dropout point. It seems vague because it's dependent on the clock frequency. The output will remain regulated with the input voltage about 100mV-300mV (based on your clock frequency) above your output set voltage.

7.3.1.4 Dropout Mode Operation and Bootstrap Voltage (BOOT)
The TPS65320D-Q1 buck regulator has an integrated boot regulator and requires a small ceramic capacitor
between the BOOT pin and the SW pin to provide the gate-drive voltage for the high-side MOSFET. The BOOT
capacitor recharges when the high-side MOSFET is off and the low-side diode conducts. The value of this
ceramic capacitor must be 0.1 μF. TI recommends a ceramic capacitor with an X7R or X5R grade dielectric and
a voltage rating of 10 V or higher because of the stable characteristics over temperature and over voltage.
To improve drop out, the high-side MOSFET of the TPS65320D-Q1 buck regulator remains on for 7 consecutive
switching cycles, and is forced off during the 8th switching cycle to allow the low-side diode to conduct and
refresh the charge on the BOOT capacitor. Because the current supplied by the BOOT capacitor is low, the highside
MOSFET can remain on before it is required to refresh the BOOT capacitor. The effective duty cycle of the
switching regulator under this operation can be higher than the fixed-frequency PWM operation through skipping
switching cycles.


With both rails running and idle at 2.2Mhz the EVM is drawing 2mA. With both rails disabled I measure 1.6uA. You can lower the idle current some by using higher value resistors in the divider feedback for both rails. (Max R1+R2 values should be <500K Ohms)

Let me know if you have any more questions.

Eli,
Normally the BOOT capacitor recharges when the high-side MOSFET is off and the low-side diode conducts. When the input voltage drops to a point where the regulator turns on the high side Mosfet 100% of the time, theoretically it's 100% for 7 periods and off for one period. To say that it is on for 87.5% is not correct. That would indicate that the high side Mosfet is on for 87.5% of one period. This device is on 100% for 7 periods and off for one period.
Depending on the load and discharge of the output capacitors the voltage drop is usually very close to 99% duty cycle and the output voltage is usually between 100mV and 300mV (based on load and output capacitance) below the input voltage. When the duty cycle hits 100% (theoretically) it starts with the 7 on and 1 off timing.

Let me know if you still have questions.