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TL431: TL431 w/ buffered output

Part Number: TL431
Other Parts Discussed in Thread: LM117, ,

Hello,

Background:

I am designing signal conditioning circuits that level shifts from 3.3 or 5.25V to 15V and from 15V to 3.3 or 5.25V (for interfacing between PXI digital I/O and a unit under test (UUT)). The connections will be configurable within the product, so I want to protect the inputs of my circuitry against over-voltage in case incorrect connections are made. On the low voltage side (3.3 or 5.25), I am using an input resistor (10k) connected to the anode of a low capacitance diode (2pF) with collector tied to the 3.3 or 5.25 rail. Assuming worst case of all inputs pulled to +15V, the 1.15mA per input adds up quickly for the many channels I'm using.

I want to use the TL431IB for its accuracy, but need to buffer its output to sink < 200mA.  So, I have designed a simple NPN/PNP push-pull buffer w/ a 10uF output cap as shown here.

R2 (100 ohms) is used to allow limited control of the output when the base/emitter junctions are "off".

Based on the TL431 data sheet, I believe the output cap in series with R2 is OK.

Also, The JP11, R3 & R5 resistors are to allow for choosing the 3.3 or 5.25V output.

Question:

Are there any "red flag" concerns to which I should be paying attention?


Including for example: looking at data sheets for some regulators, diodes are recommended for certain conditions (e.g. turn off), such as shown in the following excerpt from the LM117 datasheet. Would this be a concern for my circuit?

Any suggestions or warnings will be appreciated.

- James

  • Hi James,

    I have a couple of concerns that need to be taken into consideration when designing this.
    I would recommend to make R1 on the smaller side so both transistors to be turned on properly and the device to be more stable.
    I would make C1 big.
    The main concern over the circuit is the C3 cap. The TL431 has regions of stability and it is ideal to stay within these regions. There is a misconception that this stability is only related to the capacitors on cathode of the TL431. In reality the stability is based on the feedback network of the TL431. In this situation the feedback loop is TL431 cathode -> V1/V3 -> FB resistors -> TL431 FB pin. The capacitor that determines stability is going to be the C3 capacitor. The region of stability is actually reduced in this application because each of the stability regions and amplification from the TL431 -> V1/V3 have an effect. I would make C3 either very large or very small.
    One suggest is using a TL431LI as the stability region on this device is smaller compared to typical TL431 devices.
    ATL431LI can be used if you need a '431 device with a lower Ika for a smaller quiescent current.
    TL431 does not have a concert over turn on and turn off. One thing to note is that sometimes this discrete LDO application does require a small minimum output current to have a regulated output 1mA or else the voltage can be unregulated.

    -Marcoo
  • Hi Marcoo,

    Thank you for your guidance.

    I did some simulations and picked R1 = 300 ohms/1W, R2 = 100 ohms and C3 = 10uF. This combination seems to work well.

    One problem that I ran into was when simulating high speed load changes. I went through a learning curve regarding base resistance and capacitance internal to the BJTs. I had to find BJTs that had low time constants (i.e. low RB and low CJE||CJC in the spice models). Transistors with higher internal time constants created large momentary currents during the load step changes; these momentary "overshoot/ringing" currents far exceeded the devices' Safe Operating Area (SOA).

    So, the tradeoff I struggled with was finding a pair of transistors that generated the smallest current overshoot/ringing but with a large enough SOA (derated conservatively for temperature rise and worst case operation) to meet my power & board space requirements.

    Again, thank you!

    -James