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TPS65910: I2C glitch

Part Number: TPS65910

Hi team,

  I noticed the the doc mentioning the TPS65910 not handling well glitch on I2C. Solution is to repeat I2C access. How much time we should delay after 1st attempt and before the 2nd attempt? 

  Thanks.

Regards,

Patrick

  • Patrick,

    The Errata document you are referring to states: "In the current design, the SCL line must toggle two times to detect a new start event and completely restart the I2C access."

    It does not appear to be a time-based issue. It is relatively common for the master in an I2C bus to toggle the CLK line up to 8 times if it detects that there is an issue with the bus, typically when the SDA line is held low (a "hung bus").

    If you are suspicious that a glitch has occurred and the data may be corrupted, you can repeat the same I2C transaction, or you can perform a "dummy" read to pulse the clock before sending additional data.