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TLV62130: Snubber with TLV62130

Part Number: TLV62130

Spike noise was not small in the current circuit board. I want to try snubber circuit to reduce the spike noise but no reference in the datasheet.

Do you think it's worth trying? Any advice on this?

  • Hello user,

    Can you be a bit more specific regarding the spike noise that you are observing on your circuit board, can you share with us waveforms that show the challenge you are facing?

    A little extra work on the layout of your system is good practice to reduce noise.

    I recommend you have a look a this App Note: http://www.ti.com/lit/an/slyt614/slyt614.pdf

    Thank you very much!

    Best Regards,

    Dorian

       

  • Hi Dorian,

    Thank you for repling.

    I thought you were afraid of ringing caused by probes. But never mind. I'm using active probe with short lead.

    The peak of the spike noise is more than 30mV. It's not very big but I want to reduce that.

    I plan to start from 4.7ohm and 470pF.

    By the way, I have one concern I'd like to discuss.

    I think Cout ground is too close to Cin loop in attached reference.

    I agree it's good from the point of footprint but not good from the point of noise reduction.

    What do you think.

    Regards,

    e2e_attach1.pdfe2e_attach2.pdfKoike

  • Hello,

    You are right to mention this, a good Low-Inductance probing technique is essential for these types of improvement.

    As you are planning to use a snubber circuit to minimize ringing, here is an app note you should read:

    http://www.ti.com/lit/an/slva255/slva255.pdf

    It is always good to keep in mind, what should my power traces should look like around my system? What is the shortest way I could link them?

    It is really important in a switched-mode power supply to minimize the paths between each power components such as input/output capacitors and inductor.

    The longer the traces you have between your power components ,where a non-negligible amount of current will flow, the more parasitic inductances you will have.

    Keeping those loops small is fundamental to enable the best operation of your device.

    In this case you will have a long connection between Cin ground and Cout ground. I recommend you shorten this link.

    Here also you can find a great app note about the five steps of a great PCB layout:

     http://www.ti.com/lit/an/slyt614/slyt614.pdf

    Thank you very much!

    Best Regards,
    Dorian

  • Hi Dorian,

    Thank you for replying. I think we are on the same page.

    I appreciate your support.

    Regards,

    Koike