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CSD18543Q3A: possibility of damage when gate rise time is very slow

Shinichi Inoue
Guru 19671 points
Part Number: CSD18543Q3A

Dear Specialists,

My customer is considering CSD18543Q3A and has a question.

I would be grateful if you could advise.

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I'd like to confirm if the FET is damaged when the rise time of the gate of CSD18543Q3A.

The rise time of the CMOS gate is generally found that should be within 200 to 400 ns in the datasheet.

But in our application, it will be around 500ns because of measure against noise.

Is there any problem with using CSD18543Q3A 500ns gate rise time? 

I couldn't decide OK or NG because it isn't listed in the data sheet.

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I appreciate your great help in advance.

Best regards,

Shinichi

  • 0
    TI__Expert 6855 points

    Shinichi san,

    Thank you for your question and interest in our MOSFETs.

    As long as the operation of the MOSFET is within the device SOA (fig 10 inthe datasheet), the rise and/or fall time of the gate does not matter.

    The datasheet parameters for switching are simply for a particular set of conditions, these are not fixed for use in an application. We wrote a blog on the switching parameters here to show how these parameters can be impacted by set up etc. See link here:

  • 0 in reply to Chris Bull
    Guru 19671 points

    Hi Chris,

    Thank you for your reply.

    I understand gate rise/fall time doesn't matter as long as in the SOA area.

    I'll share this information with the customer.

    I appreciate your great help and cooperation.

    Best regards,

    Shinichi