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UCC28700-Q1: UCC28700-Q1

Soumya
Prodigy 495 points
Part Number: UCC28700-Q1
Other Parts Discussed in Thread: UCC28700,

Hi,

Can you please help with the customer inquiry below? They have sent a report with waveforms of set up and flyback schematics.  Please provide an email where I should send this to.

There is an output intermittent issue related to common mode noise on the input voltage at Vblk observed with the fly-back controller using TI p/n: UCC28700QDBVRQ1

When DC input (Vblk) contains common mode noise due to boosting PWM operation at 470 kHz, output voltage become unstable or drop out and drop in.

Questions to TI:
1) Please go over this report. Any comments are appreciated
2) What are the common reasons for the fly-back switching become irregular?
3) Sometime DRV signal turn on Primary winding longer than other times. What condition determine the turn on duration?

  • 0
    TI__Expert 8210 points

    Soumya

    First off if your customer is having issues with a design using one of our PSR flyback controllers we recommend they review the following debug app note 

    http://www.ti.com/lit/an/slua783/slua783.pdf

    Below are answers to the questions

    1. No report is attached for us to review

    2. the app note I shared previously covers common issues seen with this family of devices, which include output voltage irregularities

    3. The DRV pin is the output that drives the FET.  It's frequency and/or duty cycle is controlled by VS and CS pin inputs.

    It sounds like this common mode noise is causing the signal on either the VS or CS pin to get corrupted, which is interfering with the UCC28700 operation.  The VS pin in particular is very sensitive to electrical noise, section 8.4.1 (page 12-14) in the datasheet goes into detail about what the waveform should be.  If the common mode noise is causing the waveform to be different we recommend that you add filtering to improve it.  Please note that the maximum capacitance at the VS pin we recommend is 4pF to prevent additional improper behavior.

    Best Regards,

    Eric

  • 0 in reply to Eric Faraci
    TI__Prodigy 495 points

    Aveox_Fly-back.pdfHi Eric- Thanks for your response. Will communicate your suggestions to the customer.  I missed to attach the report earlier. Here you go-

  • 0 in reply to Soumya
    TI__Expert 8210 points

    Soumya

    Below are my comments based on the report

    • The layout does not follow our recommendations.  For starters it appears that all the semiconductors are underneath the magnetics, the VDD bypass capacitor C4 is far away from UCC28700-Q1 with a long trace and the VS pin has a very large trace between VS pin, R6 and R8.  We recommend they review the layout recommendations in section 10 (page 26-27) in the datasheet and update the layout accordingly
    • The waveforms provided don't have much information that is helpful.  After implementing the layout changes recommended, if there is still improper operation we recommend that they measure VDD, CS, DRV and Aux winding over a few switching cycles to determine what is going on.  We do not recommend probing VS pin directly since the parasitic capacitance from a probe can interfere with operation.  If the converter is shutting down, a fault may be triggered. Section 7.3.2 (page 12) gives an overview of all the fault conditions that could be shutting down the converter.

    Best Regards,

    Eric

  • 0 in reply to Eric Faraci
    Prodigy 10 points

    Hello Soumya Alva,

    Thank you for reply with meaningful information.

    Since relay out this board would take me sometime. I'm connecting the scope to: Aux winding, Vdd, CS, DRV all respect to pin 5 of the UCC28700QDBVRQ1.

    I'll send you when I get the results.

    Thank you for your support

    Dung Do
    Electrical Engineer
    2265 Ward Avenue, Unit A
    Simi Valley, CA 93065
    P: 805.915.0200 Ext 408
    dung@aveox.com
    www.aveox.com