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UCD90120A: Application questions : Q1. Why OFF sequence with warm ? Q2 How to execute ON sequence again after shut down via any fault?

Part Number: UCD90120A
Other Parts Discussed in Thread: UCD90SEQ64EVM-650, UCD90160A

Q1: Why OFF sequence with warm?

I have configured 2 GPIO to control 10 rails power, one is "PWR_ON" ,active high for power on/off control, other is "/FLT_I", active low, it's function as external fault signal input to disable "PWR_ON" turn-on & shut down all rails when "/FLT_I" = 0;  3 type behavior be described following:

1."PWR_ON" behavior is correctly !

"PWR_ON" = 1 (with "/FLT_I"=1), all rails turn on following the on-sequence.

"PWR_ON" = 0 (with "/FLT_I"=1)  all rails turn off following the off-sequence.

2."/FLT_I" behavior result a warm message:<off sequence timeout> on rail #9 & rail #10 with correct off sequence.

I make sure the time is equal to rail #10's off sequence timeout period (time between "/FLT_I" falling to low and rail #10's enable de-asserted to low ).

3. UV/OV of any rail  fault (except rail #10) cause shut down behavior result a warm message:<off sequence timeout> on rail #9 & rail #10 with correct off sequence.

I make sure the time is equal to rail #10's off sequence timeout period (time between "MON #" voltage below the power good off and rail #10's enable de-asserted to low ).

I expect the  shut down procedure is a correct off sequence without any warm , but type 2 & 3 still get off sequence timeout !

Q2: How to execute ON sequence again after  shut down via any fault?

My UCD90120A will shut down following off sequence when any fault occurred, I clear all faults via the PMBUS then drive "PWR_ON" from 0 to 1 , but the on-sequence cannot produce again!

Only press /RESET button on the EVB of  UCD90SEQ64EVM-650 to reset chip, the "PWR_ON" signal can be available again!

Is the rs-start configuration problem ?  How do I configure the re-start can match above function description?

May anyone can give me any advice to solve it ? Thanks a lot!

My UCD90120A configuration setting file:

UCD90120A 2.3.4.0 Address 101 Project File.xml

  • Hello

    #1. Q1: Why OFF sequence with warm?

    Please check section 4.2 of http://www.ti.com/lit/an/slua815b/slua815b.pdf to understand how dependencies are met.

    For GPI, they are considered to meet the sequence off dependencies only if they are de-asserted. I do not think this is the case in your system,

    Why do you want to have the turn off dependencies on the GPIO1 and GPIO2 for Rail 9 and 10. These two signals are used to turn on and off rails. there is no meaning to set as turn off dependencies.

    #2. Q2: How to execute ON sequence again after  shut down via any fault?


    What's the state of the /FLT_1?

    Regards

    yihe

  • Thanks for your reply,

    About #1. Q1 , I have changed the /FLT_I polarity to active high with inactive <GPI fault enable> feature & update PSRS config  to met asserted for ON, de-asserted  for OFF, but turn-off result still with same warm !! so I cannot make sure how to config this GPI to get my expectantly!

    My original configuration only Rail#9 supply enable signal and enable share to Rail#10 hardware,The <off sequence timeout> warm only be mark on Rail9 & Rail10 when turn-off via /FLT_I (active-low, asserted)  or FLT_I (active-high,de-asserted) or anyone rail cause fault .
    So I change Rail#10 configuration to provide an independent enable want to solve  <off sequence timeout> warm, but on difference!

    In this case, my purpose of UCD90120A is 
    ( this function is correct)
    PWR_ON function as normal ON,OFF control signal:
    PWR_ON=1 (/FLT_I = 1, FLTREG_CLR = 0 or 1) : sequence on 10 rail.
    PWR_ON=0 (/FLT_I = 1, FLTREG_CLR = 0 or 1) : sequence off 10 rail without any fault or warm.

    ( this function is incorrect)
    /FLT_I       function as a external fault signal, when external fault active, disable PWR_ON function & sequence turn-off whole rail if PWR_ON =1.
    /FLT_I =0 (PWR_ON = 1, FLTREG_CLR = 0 or 1) : sequence off 10 rail without any fault or warm.
    /FLT_I =0 (PWR_ON = 0, FLTREG_CLR = 0 or 1) : no change.
    /FLT_I =1 (PWR_ON = 1/0, FLTREG_CLR = 0 or 1) : sequence on 10 rail / sequence off 10 rail without any fault or warm.

    ( this function is incorrect)
    /FLTREG_CLR function as a latched statuses clear source, FLTREG_CLR =0 to clear whole latched register ( fault  latched ?)
    /FLTREG_CLR = 0, (PWR_ON = 0 or 1, FLTREG_CLR = 0 or 1) : clear whole fault latched register.

    Can you give me some advice for above questions or how to config can reach my target function?


    Thanks for your assistance again!

  • Hello

    When FLT_I is low , your PWR_ON signal is still at HIGH which is considered as ASSERTED. that's why you get the sequence off warning.

    As said. why do you need set the sequencing off dependencies on these two signals which are used to power on / off the rails.

    As for the FLTREG_CLR, does it not clear the latch status? what's the problem?

    Regards

    yihe

  • Thanks for your reply,

    When I configure FLT_I to a active high signal ( without GPI fault enable behavior), On the PSRS configuration I set as following:

    FLT_I             PWR_ON      state  enable    Turn off mode Rail#1 ~Rail#10    : My expect function

    De-asserted  De-asserted      0/4      Uncheck                                                    : Power off status & external fault active

    De-asserted  Asserted           1/5      Check      soft off          whole off               : External fault active so by-pass power on function

    Asserted       De-asserted      2/6      Check      soft off          whole off               : External fault inactive, normal power off function.

    Asserted       Asserted           3/7       Check      soft off          whole on               : External fault inactive, normal power on function.

    "When FLT_I is low , your PWR_ON signal is still at HIGH which is considered as ASSERTED. that's why you get the sequence off warning."

    Your meaning is FLT_I is de-asserted & PWR_ON is asserted right ? but I set this input condition will do soft-off function ! 

    Now, I am confused about PSRS vs CPIs off dependencies on sequencing of Rail Configuration page vs GPIs general purpose inputs of Hardware Configuration .

    The polarity config on GPIs general purpose inputs of Hardware Configuration:
    Just decision Active-high : Asserted=1,De-asserted =0 & Active-low : Asserted=0,De-asserted =1 ?
    The special behavior will active on above selected? If FLT_I set Active-high with GPI Fault Enable, when FLT_I =1 (Asserted ) will execute Fault Enable function ? or ?? I cannot found descriptions for <GPIs Fault Enable> behavior in UCD90120A's data sheet, but UCD90160A's content can found this feature! UCD90120A do not support this feature or how to active this function?

    CPIs on/off dependencies on sequencing of Rail Configuration page:
    Just selected which GPIs is active for on/off control, but the behavior is configure on PSRS ?
    If unchecked GPI signals are include the PSRS config, these should be described or unnecessary ?

    " why do you need set the sequencing off dependencies on these two signals which are used to power on / off the rails"

    I want to accomplish 2 type control method for power on/off, 1st is normal power on/off via the PWR_ON, 2nd is power off  via FLT_I =0 when PWR_ON =1 & by-pass power on when PWR_ON=1; 
    So I set these two signals to control on/off.

    "As for the FLTREG_CLR, does it not clear the latch status? what's the problem?" 

    I found my problem on this question, I am misunderstanding the "Latched Status Clear" feature will clear all fault register ( about UV/OV....... any monitoring fault), It clear GPO latched signal only! 
    So I have a new question about how to clear inner fault register (  UV/OV....... any monitoring fault) via external GPI, or it clear via PMBUS command only?
    & How to set  power-on ( PWR_ON=1 & FLT_I =1) again without hardware /RESET executed. Is feasible this feature ?

    Thanks for your assistance!

    Jack Lin

  • Hello Jack

    #1 I need explain little more about sequencing off dependency. Sequencing off dependency will never initialize a sequencing off. The device will check rails' sequencing off dependencies only if the rails are asked to turn off. It does not make sense to set PWR_ON and FLT_1 as sequencing off dependencies for rail 9 and 10. rail 9 and 10 will not turn off because this. The reason that rail 9 and 10 are off in your test is due to the fact that PWR_ON and FLT_L are used for PIN SELECTED RAIL STATE.

    In the PIN SELECTED RAIL STATE, when PWR_ON is asserted FLT_L is DE_ASSERTD, the rails are set to off. but at this moment PWR_ON is asserted, that's why the sequencing off warning is reported.

    Please read section 4.6 of http://www.ti.com/lit/an/slua815b/slua815b.pdf for more details

    #2. FLTREG_CLR only clears latch status which may have impact on the LGPO if it is based on the latches status. the fault status can only be cleared by PMBus Command.

    Do you mean PWR_ON and FLT_1 are generated from UCD?

    Regards

    Yihe

  • About #1

    "The device will check rails' sequencing off dependencies only if the rails are asked to turn off", I can not make sure this mean about "if the rails are asked to turn off", how to make a turn-off asking ?  Is configuring PIN SELECTED RAIL STATE?
    My PIN SELECTED RAIL STATE config result the off-sequence timeout on the  rail 9 &10, but the UCD will shut down follow the off sequence with off sequence timeout warming on the  rail 9 &10 if any fault ( UV/OV/ ON SEQ TIMEOUT..)  cause! How to fix this timeout problem?

    About#2

    The PWR_ON sourced from the FPGA and FLT_I sourced from another UCD or sub-FPGA.
    Whole power status, voltage will be read-back via PMBUS, this PMBUS function as the power data,status polling bus only; Power on,off, fault clear will be controlled by the FPGA, so I want to know how to execute power on after UCD has shut down via any fault condition?

    Thanks for your assistance!

    Jack Lin

  • Hello

    #1. Remove the PRW_ON and FLT_L as dependencies from rail 9 and rail 10. this shall solve your issues.

    The rails will be asked to turn off if one of the following conditions are met:

    A. the rail has fault and the fault response is set to shutdown

    B. each rail has its own ON/OFF_CONFIG settings, such as AUTO, CONTROL PIN Only, OPERATION only, CONTROL & OPERATION.  The condition of the ON/OFF_CONIG is met to turn off. in your case, it is the PIN SELECTED RAIL STATE.

    As I explained, you will  get SEQUENCE OFF WARNING for sure based on what your described.  Do you still need have these two signals as dependencies after my explanation?

    #2. You can just toggle the PWR_ON or FLT_L to ensure  that they are in the correct state to turn on the  power.

    Regards

    Yihe

  • Hi Yihe,

    Thanks for your reply,

    The question 1 has solved, I unchecked the PWR_ON & FLT_I on GPI's dependencies OFF setting of rail 9 & 10 , as your advice ! 
    The ON/OFF control & FLT_I operation has accomplished  my expect function.

    The question 2 "Q2 How to execute ON sequence again after shut down via any fault?" I still don't find solution, now the normal operation about PWR_ON & FLT_I can switch normally turn-on & turn-off function without any warning. When I set any rail to OV / UV condition to trigger shutdown procedure, the status monitor can read right fault message and fault status can clear via the PMBUS command, when I restored whole rail to normal status ( no any fault), the ON function cannot regain except EVB's hardware reset has produced! 

    May you guide me , which document describe above contents or what's the correct procedure ? Thanks!

    Regards.

    Jack Lin

  • Hello

    For the #2. after the OV/UV fault, are all rails off properly due to fault? if so, what's state of the PWR_ON & FLT_L?  I assumed that both shall be high since that's the condition to turn on the rail. at this moment, you need toggle either one to make it LOW first followed a HIGH. the rails shall be on properly.

    Regards

    Yihe

  • Yes, When a UV fault detected ,my PWR_ON & FLT_I was kept high both, I follow your recommendation to switch PWR_ON to low then set to high again, but no sequence on response! 

    Following is my EVB status picture, may I miss any key point ?
    Thanks for your assistance!

    Regards.

    Jack Lin

  • Hello

    I was able to duplicate the issue and confirm that this a bug when PIN SELECTED RAIL STATUS is used to re-sequencing the faulted rails.

    There is another way to do so. after rails are shutdown due to a fault, you can enable the re-sequencing feature inside the fault response to re-sequencing the rail without using PWR_ON and FLT_L signal.

    you can set the how many re-sequencing to try and the interval between each re-sequencing.

    once the re-sequencing count is expired, the device will not start the resequencing again until the device is reset or power up.

    Will this work for you?

    Regards

    Yihe

     

  • Unfortunately re-sequencing can not meet my whole application! It can cover such case during system start-up stage, but when rail fault under operation stage ( whole power rails have readied sequence-on ),  re-sequence may has risk to damage fault circuit block!

    My controller detected fault alert will do some confirm procedure then decide shutdown otherwise circuit ( disable whole board power source) or re sequence-on again! 

    Can fix this bug when Fusion design software has updated ? I can wait few weeks if the answer is positive or replace this part if answer is negative!

    Thanks for your reply 

    Regards.

    Jack

  • Hello

    Will the following work solution work for you?

    Do not use the PIN SELECTED RAIL STATE function.

    1. connect the PWR_ON signal to the PMBUS_CTRL pin of UCD90120A

    2.Connected the FLR_ signal to one of the remaining MONx pin. Enable the fault response for the UV case so when the signal is low, all rails will be shutdown.

    3. configure the ON/OFF_CONFIG of all rails to CONTROL PIN CONTROL

    4. set the rail defined in the step 2 as sequencing on dependency as the rest rails in the system, disable the sequencing timeout.

    This way, when the fault is present on any given rails, you can just toggle the PWR_ON signal to re-sequence the system.

    Regards

    Yihe

  • Hi Yihe,

    Your suggestion may be workable for my application, I will to experiment this configuration then feedback result to here.

    Thanks & Regards.

    Jack

  • Hi jack

    Please reply back so that we can close this.

    Regards

    Yihe

  • Hi Yihe,

    I have followed your suggestion to configure UCD90120A:

    1. Set FLT_I active high with GIP fault enable special behavior for external fault input.

    2. Set whole rails  "both control pin & operation" on "How to turn rail on/off" feature.

    3. Active GPI fault log for FLT_I signal.

    3. Enable FLT_I  pin de-asserted soft off on PSRS.

    Above configuration has made following behavior that's solved my system requirements!

    a. PMBUS's control =1/0 with FLT_I=1 to turn on/off normally.

    b. When rail's fault or FLT_I de-asserted will shutdown for fault protection.

    c. Toggle the PMBUS's control from 0 to 1 can re-sequence on again after whole fault condition have eliminated.

    Thanks & Regards.

    Jack