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• TI Thinks Resolved

# LMR14006: Vin 36V, Vout 12V is possible?

Part Number: LMR14006

Hello,

LMR14006Y min on time is 95ns. swtiching frequency is 2415kHz is tougher condition I think. 2415kHz period is 414ns.

Duty will be around 24% = 95ns/414ns.

When Vout is 12V desired, around 50V = 12/0.24 is max possible voltage I think.

This is no margin. It should be lower Vin will be needed.

When Vin is 36V, I think there is margin and will work. Does my understand correctly?

I tried this in power designer but max input voltage is 25.5V even though I set VIN = 36Vmax.

Please let me confirm if LMR14006Y can support Vin = 36V, Vout = 12V condition.

Best regards,

Toshihiro Watanabe

• Toshihiro,

It is OK LMR14006Y to support this spec.

Gavin

• In reply to Gavin Wang (Zejing):

Hello Gavin-san,

Thank you for your answer. We are considering to use lower output current like less than 50mA.

Section 8.1.2.2 of datasheet calculation, the inductance value is very big. I guess this is because ripple current sets 30% of output current.

We can't use such a large value inductance. Hopefully, We want to use similar value of figure 10.

Best regards,

Toshihiro Watanabe

• In reply to Toshihiro Watanabe:

Toshihiro,

Yes, you can use similar value of figure 10.

Section 8.1.2.2 of datasheet calculation means that you can use bigger inductance value but with smaller saturated current which means smaller size.

3.3uH is OK.

Gavin

• In reply to Gavin Wang (Zejing):

Hello Gavin-san,

When light load, some DCDC converter is PFM mode. LMR14006 is peak current control mode. I couldn't imagine how to work when light load.

I guess inductor current would be non-continuous and high side MOSFET become short duty cycle. I tried to check this by power designer but couldn't understand it because simulation time was short.

It would be helpful if I can know the operation of peak current mode control when light load.

Best regards,

Toshihiro Watanabe

• In reply to Toshihiro Watanabe:

Toshihiro,

The LMR14006 operates in sleep mode at light load currents to improve efficiency by reducing switching and gate drive losses. The LMR14006 is designed so that if the output voltage is within regulation and the peak switch current at the end of any switching cycle is below the sleep current threshold, IINDUCTOR ≤ 80 mA, the device enters sleep mode. For sleep mode operation, the LMR14006 senses peak current, not average or load current, so the load current where the device enters sleep mode is dependent on the output inductor value. When the load current is low and the output voltage is within regulation, the device enters a sleep mode and draws only 28 µA input quiescent current.

Gavin