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TPS56520: I2C Timing Requirement
Part Number: TPS56520
When I look at the 7.6 Timing Requirements of datasheet of TPS56520, tHD;DAT (Data Hold Time) says that Min=50ns and Max=900ns.
But when I look at the tHD;DAT specification of I2CBus user manual from NXP (Philips), it says that Min=0ns and Max=No Limit.
Q-1: Why does the datasheet of TPS56520 have the Max limit of tHD:DATA (Data Hold Time)?
Q-2: What is the reason of that?
Q-3: Can we expand the Max limit of tHD:DATA of TPS56520?
For Q1 and Q2,
TPS56520 can support fast-mode plus, the max CLK frequency is 1MHz, the period will be 1000nSec, in one period, we should leave time for other parameter, tr, tf, tSU;DAT and so on, so TI set 900nSec MAX limit, I think this make sense.
When using standard mode(100kHz) and fast mode(400kHz), we can expand the 900nS max limit.
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