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UCC28710: UCC28710 SPICE model issues

Matthew Bloom5
Intellectual 330 points
Part Number: UCC28710
Other Parts Discussed in Thread: TINA-TI

Hi,

I'm using the UCC28710 model in a circuit. The .opj provided by TI works, but when I try to use the model in my own simulation, it does not work.

  • 0
    TI__Expert 8210 points

    Matthew

    You will need to provide more detail for us to be able to help.  Can you please answer the following questions?  Please provide as much detail as possible.  If you are not sure on what information to provide please provide a screenshot.

    • What simulator are you using?
    • What is the exact error are you having?

    Best Regards,

    Eric

  • 0 in reply to Eric Faraci
    Intellectual 330 points

    Hi Eric,

    I'm using OrCAD PSpice 17.2.

    The error is that the model simply doesn't do anything. I'd at least expect the VDD cap voltage to grow to ~10V per the datasheet, but everything stays in the fV range for the simulation time of 100ms. See attached for screenshots.

  • 0 in reply to Matthew Bloom5
    Intellectual 330 points

    Hi again,

    I tried building the same model in TINA-TI, but I'm experiencing the same issues. See attached for my SPICE file.UCC28710_fly_test.TSC

  • 0 in reply to Matthew Bloom5
    TI__Expert 8210 points

    Matthew

    I am working with our experts on this model to verify why the HV current source for startup is not operating as expected.  I will have an update to you on the status of this early next week.

    In the meantime we recommend that you use an external voltage source for VDD or use a resistor from input voltage to VDD for startup.

    I noticed that your design does not have a winding on the transformer.  Once UCC28710 reaches UVLO turn on and starts switching, VDD power needs to come from another source.  For isolated designs an aux wining is used.  This design you are working on looks to be non-isolated, so you can use the output winding to achieve this.

    Best Regards,

    Eric

  • 0 in reply to Eric Faraci
    Intellectual 330 points

    Hi Eric, thanks for looking into this.

    I tried adding a DC source on the VDD pin, but still got the same result. Please see attached for the updated sim file.

    As for the aux winding - Once we get the base simulation working, I plan on adding it.8715.UCC28710_fly_test.TSC

  • 0 in reply to Matthew Bloom5
    TI__Expert 8210 points

    Matthew

    After looking into this we have identified an error in the UCC28710 model on the HV startup circuit.  It will take us some time to correct it, so for the simulations you're running please use an external DC source or a resistor from the high voltage input to VDD.

    The UVLO turn on threshold of UCC28710 is 21V typical.  In order to start up the voltage on VDD needs to exceed this threshold.  In your simulation file with the DC source you only have 15V on VDD.  You need to have the source exceed 21V, either by setting it at a DC value above  the UVLO turn on (such as 24V) or have a pulse where it exceeds 21V then reduces to a lower voltage like 15V.  Once operating VDD needs to be above the UVLO turn off threshold of 8.1V typical to operate.

    When I updated your simulation file to set VDD DC source V2 at 24V it started operating correctly.  There was an error with the wire between DRV pin and SW1 gate that was resolved when I deleted and redrew the wire.  I had to reduced R4 from 6.99M to 6.99k to get regular PWM pulses and an output voltage, your original value for this component was too high and causing a fault condition to trigger.

    Best Regards,

    Eric