Other Parts Discussed in Thread: AM3358, ,
Hi, we are changing the PMIC from TPS65910AA1 to TPS65910A3A1 to support for DDR3 device on an existing product. The PWRHOLD pin was connected to VDDS_DDR(SWIO output) in current product, see below schematic, we realized that the HI level margin become less for the PWRHOLD after the change, as VDDS_DDR from 1.8V to 1.5V.
We did a experiment on current product that connect the PWRHOLD to the output of VDAC output, but the system cannot power down successfully. Only we change to VAUX33, the system can power off.
Could you help me to understand the reason of the behavior?