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TPS65910: TPS65910A : VDIG1 and VDIG2 is unnormal compare with VMMC

Part Number: TPS65910

Hi, everyone:

  I don't agree the last result(https://e2e.ti.com/support/power-management/f/196/t/585576?tisearch=e2e-sitesearch&keymatch=TPS65910%25252520%25252520%25252520%25252520VDIG1) because his  waveforms is not really accurate。My waveform is 100us/div,and I see the same phenomenon as (the last questioner)。so,that's my test picture of VDIG1,is it correct and just a regular phenomenon?

  • Hello,

    Yes, this is correct and normal phenomenon for DIG1 output of TPS65910 device.

    What you are seeing is the controlled "Turn-on time"  (VOUT = 0.1 V up to VOUTmin), which has a typical value of 100us. 

    Coincidentally, your scope shot is zoomed in to show a time division of 100us/div, so you can see clearly the time from VOUT=0.1V up to 1.8V-3% is almost exactly 100us.

  • Hi,Berner:

        As you said,what I see is the "VOUT = 0.1 V up to VOUTmin".But when the Step of waves came in, the voltage of VDIG was not up to VOUTmin(about 1.75V).Actually,  the voltage was aobut 1.5V.Could you explain it ?

  • The slew rate from 0 to 1.4V is very fast --> 1.5V/12us = 0.125V/us. If this slew rate were constant, VDIG1 would reach 1.8V in 14us instead of 100us.

    The slew rate from 0 to 1.4V should be ignored. This is how fast the VDIG1 would ramp if it were not controlled. The fact that VDIG1 is forced to take 100us to ramp up to VOUT,MIN is the reason for the step (0 to 1.4V, then stop), not an issue with the device. The step is followed by an RC delay that ramps up to the final voltage

    You are thinking of the step as a problem, not as a deliberately intended design technique used to control the ramp rate of this LDO. The only requirement of the datasheet is that the "Turn-on time"  (VOUT = 0.1 V up to VOUTmin) has a typical value of 100us. 

    I cannot say why this design technique was used, but I can say that it is intentional and it is used to meet the "Turn-on time" spec of 100us. Measuring the turn-on time of all LDOs could be helpful for you to verify they are all meeting the spec. Or you could power on the TPS65910A3EVM-583 using different BOOT pin settings (BOOT1, BOOT0 pins set to 00b) to see how VDIG1 performs when the output voltage is 1.2V instead of 1.8V and compare how other LDOs turn on when the output voltage is modified by different EEPROM settings.