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UCC24612: Voltage divider at VD of ucc24612 and dead time adjustment

Edward Lee
Intellectual 1655 points
Part Number: UCC24612
Other Parts Discussed in Thread: UCC24610

Dear Team,

      My customer has a question about using resistor divider at the pin VD of ucc24612 to enlarge its voltage rating in their application.

      Will there be any concern like setting time or other side effect to this application?

    

      In addition, they have a question about the dead time adjustment! Is there any way to adjust the trigger point?

Thanks for your help

Sincerely,

Edward

  • 0
    TI__Mastermind 26770 points

    Hello Edward,

    Thank you for your interest in the UCC24612 SR controller.

    The UCC24612 VD input is rated for 230V maximum.  If your customer needs to extend this rating to a higher voltage, this application note https://www.ti.com/lit/an/slua860/slua860.pdf describes how to do so in sections 10 -13.  These techniques are described for the UCC24610 device, but can be similarly applied to the UCC24612.  (When the app-note was written, it was not anticipated that the higher UCC24612 VD-rating might also need further extension.) 

    I am unclear about the question of dead time adjustment.
    The UCC24612 is available in 2 versions, -1 and -2. Each has a specific turn-on delay, applicable to either a GaN-based or a Silicon-based primary-side power stage.  The timings for the two are different, so consider which version is more suitable to your application. 

    Because this IC is so compact an simple, no user adjustments of internal timings are possible. However, additional turn-on delay may be introduced by adding an R-C delay to the VD input.  Install a series-resistor from VD to the SR-FET drain with value ranging from 100ohm to 1kohm, and a small capacitor from VD to VS. Delay timing is adjusted empirically.   

    Regards,
    Ulrich

  • 0 in reply to Ulrich Goerke
    TI__Intellectual 1655 points

    Hi Ulrich,

          Thanks for your detailed explanation.

          The application note helps a lot. 

           Regarding the dead time adjustment, we just see it in the datasheet of SP6016D from our competitor.

           It seem to adjust relative delay time between falling edge of Vgs and rising edge of Vsync.

    Thanks

    Sincerely,

    Edward

  • 0 in reply to Edward Lee
    TI__Mastermind 26770 points

    Hello Edward,

    The UCC24612 does not need this adjustment because it automatically reduces the gate drive voltage to a low level before the end of the SR-Fet conduction.

    This achieves a very fast turn-off and low turn-off loss without significant body-diode conduction.  It does this by dynamically adjusting each cycle timing based on the previous cycles' timing.

    Regards,
    Ulrich