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LM5069: LM5069 failure after on-off testing with the GATE output, pin 10 then stuck at 0.6V when Vin is applied and never turns on the voltage to Vout once failed.

Part Number: LM5069

Hi,

We are currently using the LM5069 hot swap controller in the following attached circuit. We have made R44, the 0R resistor No Fit which is the only change so far. What we are experiencing is a failure of the device to turn on after it has been operating after approximately 30 on-off transitions over a period of a week. We have tested 7 of our hot swap controller boards and 2 have failed during normal operation.

We've gone through all the support components around the device and can't find an issue. It could be a transient causing the issue. What we have found is that on the failed units, the LM5069 is ignoring the fact that the over and under voltage conditions are fine, and Vin is at 48V.

We have measured that the GATE output is stuck at 0.6V when Vin is applied and does ramp to about 2.2V, then back down to 0.6V and stays there. Both failed devices have the same 0.6V DC voltage on the GATE output of the LM5069.

Do you know what could cause the LM5069 to fail and keep the GATE output, pin 10 at a constant voltage of 0.6V with Vin applied?

Best regards,

Patrick 

  • Hi Patrick,

    Is FET fine on the failed boards?

    Can you fill up the design calculator and send me for review.

    What is the load during the test ?

    Best regards,

    Rakesh

  • Hi Rakesh,

    Will have to get onto the design calculator next. This circuit was designed by external contractors.

    I have investigated the operation of the circuit with the legs of the Source and Gate of the MOSFET lifted, so the MOSFET is effectively out of the circuit and the GATE output remains at 0.6V. The MOSFET is rated to 120A, and we're only looking at 18A max in our design, so that should be fine. The UVLO and OVLO inputs are well within specification to indicate to the LM5069 that it is safe to turn on.

    No output is seen on the TIMER pin either, even on our boards that are operational, so that doesn't even help us to see if the device is alive.

    We are preparing to do transient turn on-off measurements to see what the input and output voltage rails, and ground look like during the on-off transitions.

    That's as much info as I can give you right now. I will work on the design calculator and get that result to you once its done.

    Does the fact that the GATE output remains at 0.6V after Vin is applied show that there is internal damage to the device? Have you seen this before?

    Best regards,

    Patrick

  • Hi Rakesh,

    I have filled out the design calculator as best I can. I've attached it to this reply.

    Best regards,

    Patrick

    0181.LM5069_Design_Calculator_REV_C.xlsx

  • Hi Patrick,

    The controller does not fail if the voltage at each of the pins is with in the abs max rating. The common reason, we see controller to fail is due to FET. If FET fails, this would stress the GATE pin of the LM5069 eventually damaging the LM5069 controller.

    The Ron should be entered in mOhm and a normalized value should be entered considering Tj. So, F54 cell should be at least 3 mOhm. With this, design is failing SOA margin. Its SOA current handling capability at the operating point is important rather than the max current rating of MOSFET (120A).

    Please refer https://e2e.ti.com/blogs_/b/powerhouse/archive/2018/04/06/how-to-select-a-mosfet-hot-swap

    http://www.ti.com/lit/an/slva673a/slva673a.pdf

    You need to use dvdt soft start circuit to have good SOA margin. Let me know if you have any followup questions.

    BR, Rakesh

  • Hi Patrick,

    I am closing this thread. If you have further questions please feel free to get back to me.

    BR, Rakesh

  • Hi Rakesh,

    I have tested the MOSFET and it was working fine. So the only issue we have is that the LM5069 is damaged, but all other associated circuitry is fine.

    We have also done further testing on working units to see if there are transients during turn on and off which could potentially cause issues and we have unfortunately found none. We don't know what the software team were turning on and off and in what order during initial development testing, they cannot recall this information, so we cannot reproduce the failure.

    We have decided to add the dvdt softstart circuitry to our design as you have suggested due to the MOSFET being outside the SOA. I used the TI excel design calculator which provides the value of Cdv/dt.

    I have desoldered the damaged LM5069 and we can send it to TI support for analysis if you think it would be of any benefit.

    Thanks for your help.

    Kind regards,

    Patrick

  • Hi Patrick,

    Sounds good.

    Regarding FA (failure analysis), it does not help much to draw any conclusions as we are not sure on the test conditions. We can definitely pursue FA if there is any systematic failure which needs to be root caused.

    Keep posting on E2E if you get further questions during evaluation.

    BR, Rakesh