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TPS7A7001: Low Dropout vs. TPS7A83A, TPS74801

Genius 16285 points
Part Number: TPS7A7001
Other Parts Discussed in Thread: TPS74801, TPS7A83A, TPS56637

Hi all

My customer has this specification for an LDO: Vin=3.4V, Vout=3.3V, Iout=1A and he preselected the TPS7A7001.

Looking at the Datasheet I find this is marginal as the max dropout can be 200mV:

As they have a 5V on the board they could also use an LDO with VBias, however the TPS74801 doesnt seem to work here as Vbias-Vout > 3.25V

Can you suggest better options ? Would the TPS7A83A work ?

Best regards

Ueli

  • Hi Ueli,

    I can try to help, but first what is the tolerance of Vin and Vout?
    Or, what is the requirement for minimum Vin and maximum Vout?

    Thanks,

    - Stephen

  • Hello Stephen

     

    Thank you for the quick reply.

    Tolerance is not yet defined and I assume they will have to choose a higher input voltage to accommodate the worst-case dropout condition.

    This means they will have to set the output voltage of the upfront DC-DC to e.g. 3.5V instead of 3.4V.

    They are just looking for the lowest dropout LDO for Vout=3.3V/1A.

     Best regards 

    Ueli

  • Hi all

    My customer has 1A and 50°C max ambient and he is referring to Figure 3 in the Datasheet:

    I pointed out that the Figures illustrate only typical values and that a conservative design should be based on guaranteed min/max values.

    Moreover one should also consider the output voltage tolerance of the upfront DC-DC and the tolerance of the LDO output voltage.

    They are using the TPS56637 upfront where we specify +/-1% for the internal voltage reference. If we add the external resistor tolerance of e.g.1% we end up with 2% total tolerance. If we take a nominal value of 3.4V the min. value of the DC-DC is 3.332V.

    For the TPS7A7001 we specify +/-2% tolerance. If we add the external resistor tolerance of e.g. 1% we end up with 3% overall tolerance. Coming from 3.3V nominal value we end up with 3.399V max value.

    Meaning the worst-case available dropout voltage is 67mV.

    Please comment if the above is correct and suggest the best-fit solution.

    Best regards

    Ueli

  • Hello Ueli,

    For the switching converter TPS56637, the total tolerance will include effects of setpoint, line transient, load transient, ripple, load regulation, line regulation, and board IR drop.  So tolerance will be higher than 2% given these other effects.  I would aim for 3% as a general requirement but that still may be low.  Each design is unique and this one will need to be evaluated for total tolerance.

    For the linear regulator TPS7A7001, the total tolerance will include effects of what was listed for the switching converter, but you can ignore ripple as the PSRR will attenuate the TPS56637 ripple to something very small at 500kHz.  You can use 3% as a general requirement but the customer should fully evaluate the design for the total tolerance.

    The tolerance of the setpoint described will be worst case (Vref tolerance + resistor tolerance = Vout tolerance, or 2%+1%=3%).
    Using a statistlcal design approach, the actual tolerance seen in the field will typically be less, which may help the customer.
    See the following App note for details.

    http://www.ti.com/lit/an/snva112a/snva112a.pdf

    Having said all this, the dropout voltage is defined as Vin - Vout = Vdropout.  In the example using 2% tolerance for the switcher, and 3% tolerance for the LDO, it is 3.332 - 3.399 = -0.067V, which is negative.  So the LDO will be in dropout and will not regulate properly.  The solution is to reduce tolerance (which is difficult to do here), raise Vin of the LDO or lower Vout of the LDO.

    Thanks,

    - Stephen

  • Hello Stephen

    Thank you for the quick reply and detailed feedback, this is very helpful.

    It seems a bit more complex than I initially suspected ...  :-)

    Best regards

    Ueli