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TPS40210: Design of DC-DC Converter 14-160V input 48V output @ 4-15W

Mark Harper
Prodigy 40 points
Part Number: TPS40210
Other Parts Discussed in Thread: PMP

Hi All,

I am new to SMPS design in general (although I have sucessfully designed a number of buck LED drivers)

I am looking to design a DC-DC converter to accept a wide ranging input for 14-160Vdc. Output can be fixed anywhere from 12V to 48V (I would prefer i higher voltage so 48V is optimum). The other main design driver is it has to be compact (PCB has no length constraint but PCB width can only be 14mm maximum and component height maximum 7mm)

After doing some pliliminary research I think the best topology for this design is SEPIC as the power is low, it needs to operate in buck-boost mode and by using a coupled inductor and only one MOSFET the component count (and footprint) can be minimised - although I am more than happy to go down a different approach if I'm wrong?

I have been looking at the TPS40210 and PMP6545 which shows a design that offers a 10-100V input and outputs 12V @1A.

From the schematic I understand that during start up the controller is powered from the input via D102, Q100 is only allowed to conduct whilst its source is less than around 8V due to the gate being supplied with 10V via R101 and D100. After startup the controller is then powered from the output. I am a little confused why Q2 and Q3 are required, they dont seem to be documented in the datasheet and are not used on some reference designs and are not on the EVAL board, can someone shed some light on this for me?

If i was to recreate this design would it be possible to just up grade the voltage rating of C2, C4, C6 and Q1 in order to change the input voltage range to 10-160V?

If I was to up grade the voltage rating of D1, C7, C8, C9 and change the value of R9 and R11 could the output voltage be adjusted to 48V?

Thank you for your advice,

Mark

  • 0
    TI__Guru 68675 points

    Hi Mark,

    Thank you for reaching out and for considering TPS40210. You actually find the good candidate and the PMP design fits well for your application.

    Your understanding about Q100 circuit is correct. And, your plan of upgrading C2, C4  and C6 are right, too.  You also need to upgrade D1, C7-9 voltage ratings to support your desired output voltage.  If it can be 48V, you may have to consider 100V ceramic capacitors. 

    Regarding Q2 and Q3, it is to increase the gate drive strength.  The TPS40210 internal driver may not be strong enough to drive Q1.  

    Hope this clarifies.   Thanks.

    Youhao Xi, Applications Engineering

  • 0 in reply to Youhao Xi
    Prodigy 40 points

    Thank you for your reply,

    I am working through the equations to work out the correct component values starting with the duty cycle. This is causing me some problems.

    As my minimum Vin is lower than Vout I can use equation 11 (page 14 of datasheet) to work out the duty cycle at low input voltages as 0.71. But at maximum Vin this equation turns negative, so I assume I need to use equation 12, but this presumes I have already selected an inductor value and switching frequency - both of which I am trying to calculate.

    I would very much appreciate a bit of guidance as to how to calculate the component values required?

    Thanks,

    Mark

  • 0 in reply to Mark Harper
    Prodigy 40 points

    Hi,

    I have done some more digging and in conjunction with Application Note AN-1484 I have come up with the attached spreadsheet. Please can you review and let me know if my calculations are correct?

    I have a problem with the Current Sense Resistor for stability as this is calculated to be negative???

    Also I am having trouble calculating the compensation network, the datasheet shows some calculations where as the application note AN-1484 shows different calculations? - please can you offer some assistance?TPS40210.xlsx

    Thanks,

    Mark

  • 0 in reply to Mark Harper
    TI__Genius 17640 points

    Hi Mark,

    Sorry for the late reply.

    I think most of the calculations look fine, but your current sense resistor for stability is applicable for a boost converter, but not a SEPIC converter.

    Finally, the compensation network design in the datasheet is for a boost converter, and this is different from the design of the loop for a SEPIC converter. I recommend following AN-1484 for a good starting point. 

    Thanks,

    Richard

  • 0 in reply to Richard Fu22
    Prodigy 40 points

    Thank you for the pointers.

    After looking through the equations for the compensation network in AN-1484 I see that for TPS40210 Vref is 0.7V but Gcs is given in the datasheet as Acs = 5.6 typ. and I think the units are different (A/V vs. V/V) - am I ok to use 5.6 or does a different value need calculating?

    Incidently in AN-1484 Gcs is worked out to be 'roughly 1/Rsn', in the worked example it is shown to be 91 but 1/19mohms is ~52, am I missing something?

    Finally the error amplifer transconductance is not given in the TPS40210 datasheet so I am unsure what values to use to work out the compensation network component values.

    Can some further claification be given?

    Thanks,

    Mark

  • 0 in reply to Mark Harper
    TI__Genius 17640 points

    Hi Mark,

    Apologies for the late reply. 

    Hopefully this may clear up some confusion. 

    The current sense amplifier gain (V/V) and the transconductance gain (A/V) should not be confused. The current sense amplifier gain is used to generate decision making process of current limit and slope compensation, whereas the transconductance gain should be used for feedback loop calculations. The TPS40210, however, uses an internal op-amp so there is no need for transconductance here. 

    In AN-1484, it is possible there may be a k-factor used in the design, which may get you the result of 91. For that application note, I would use it as a general guideline and not as an absolute.

    In this case, the best way to compensate the SEPIC is to experimentally measure the gain and phase plots since the modeling of a SEPIC power stage is complicated. In addition, you could do load transient tests to assess stability.  I think it would be in the best use of your time to experimentally measure results .

    Thanks,

    Richard