Hi Support team
As mentioned in Chapter 8.2.2.2: D-CAP3 introduce a high frequency zero ...
What means
D-CAP3 introduces a high frequency zero that reduces the gain roll off to –20 dB per decade and increases the phase to 90° one decade above the zero frequency
What is the high frequency zero point? how to determine it?
BTW, What is the response frequency & bandwidth of this IC?
Hi Red,
Like below picture shows,the output LC filter will have double pole, the gain rolls off -40dB per decade rate and the phase drops rapidly from 180deg to 0deg. But if a high frequency zero is introduced before crossover frequency, the gain rolls off -20dB per decade (only one pole left) and the phase will finally reach to 90deg. So, at the crossover frequency point, there will be a phase margin so that the system is stable.
The high frequency zero point is determined by internal circuit design and can't change externally. As long as you select the LC value within the Table 2 recommend table, the system will be stable.
Typically, the DCAP3 part will have about 100K-200K bandwidth.
Thanks,
Lishuang
