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UCC28633: Improving cross-rail regulation and optimising the overall design

Part Number: UCC28633
Other Parts Discussed in Thread: TPA3245, TPS565201, PMP30092,

I'm designing a SMPS for an audio application, but I'm struggling to make it matching the spec.
On the schematic/pcb there are provisions for other features like SSR, overvoltage/overtemp protection, which are not used at this stage.

Universal input 85-264Vac.
Main output (+VPW) is 30V 5A nominal power, and it's used for a TPA3245 class-d amp. When unit is in stand-by, no power is drawn from this rail, however it cannot exceed 32V to avoid damage to the audio amp.
+VD is an intermediate out from which is derived a 5V for logic through a DC-DC converter. 5V must be able to provide at least 1A when the main output is unloaded and >3A when unit is ON.
+VA/-VA are auxilliary outputs for classic audio opmaps. Post-regulation is done on the mainboard. +VA/-VA should be withing the range 15V-25V. Max loading: 200mA when unit is ON, disconnected when unit is off.
No load power must be <0.25W at high mains.

The main issue of the prototype is very poor cross-rail regulation.

(Vin=230Vac)

NO LOAD on +VPW

2.7A LOAD on +VPW

Note

+VPW (main out)

30V

30.6V

 

+VA

18V

>32V

10Kohm load

-VA

-18V

>-32V

10Kohm load

+VD

8.7V

18V (clamped by 15V TVS)

15Kohm load - near TPS565201 max Vin

+VAUX

11.5V

15.5V (clamped by 15V zener parallel to C27)

 

Power input

230mW

98.5W

 

As you can see, secondary outputs can even double the nominal voltage when main output is fully loaded, with the risk of failure for those components not rated that such high voltages.
I wasn't expecting very tight regulation on secondary rails, but in this case that's too poor.
On top of that, if I load just the +VD rail, the main output tends to rise dangerously as well, which is not acceptable.

One of the things I'm going to change is to derive the 5V directly from +VPW main out, which I will test soon (using a different buck IC).

How to improve cross-rail regulation? I know that this is mostly related to transformer construction, so I'm attaching spec of the one used in the prototype.
Any suggestion on winding sequence, use of internal shielding, turns spacing etc is very welcome.
Would it be preferable to switch to secondary side regulation in this case? Obv. using a different PWM controller.

Also, the RCD/TVS snubber gets very hot when fully loading the main output.
I've tried to play with RCD values, but couldn't find a good compromise with mosfet Vds peak and no-load input power yet. Any suggestion how to proceed to tune values?
When a diode/TVS solution is preferable over classic RCD snubber?

I had a look at PMP30092, but I couldn't understand why the transformer is 250uH but if you type same design spec in the UCC2863x excel calculator, it suggests only 100uH for the transformer.
Is it generally preferable to work with higher primary inductance if TX construction allows for it? (more turns, different core, etc)

To conclude, as my suggestion for TI, I would like to see the option for multi-output topology in webench.

AX-AN45 TI.pdfAXN transformer.pdf

  • Hello Francesco,

    Thank you for your interest in the UCC28633 Flyback controller.

    Transformer construction does have an influence in multi-output cross-regulation, mainly based on the leakage inductance distribution amongst all of the windings.  But additional "leakage" on each winding may be added by loop area of the pcb tracks depending on the path length and width through the output diode(s) and the filter caps back to the winding. 

    During the flyback interval the energy stored in the core magnetic field will discharge amongst the windings preferentially through the paths with the lowest inductance first.  These paths charge up their capacitances until the voltages are high enough to block further discharge and the remaining energy then goes into the next lowest path, and so on.  Outputs with no loads are susceptible to overvoltage as you are experiencing.

    Leakage inductances are unavoidable, but may be managed to try to balance the energy flow more evenly. This may be a trial and error process, mitigated somewhat by analytical reasoning about which pcb path may be increased or decreased to drive the stray inductance in a particular direction.  Also, the order of the transformer winding structure can be rearranged.  I'm sorry that I can't offer more than these generalities.  It is an iterative process, unfortunately, unless you have extensive finite element analysis capability.

    But I do recommend adding some minimum loading to each output until you get the voltages under control, then backing off on the preloads as things improve.

    To reduce the heat in your primary clamp, I recommend to go exclusively with TVS's and get rid of the RCD.  Also, increase each TVS to SMC size, instead of SMB, for better heat dissipation.  Finally, increase the voltage of each TVS to the highest you can tolerate given your maximum input voltage, reflected voltage and least tolerable MOSFET derating.  A higher clamp voltage will tend to lower the overall clamp losses closer to the theoretical leakage energy times frequency.  A second benefit of all TVS is that standby power should be reduced.  This is because at light load or no load, the RCD clamp discharges significantly between pulses and more primary energy is needed to recharge the clamp before any energy can be delivered to the output. The TVSs do not need recharging, so standby frequency can be lower and consequently so is standby power. This can mitigate some of the preloading on the outputs to some extent.

    One drawback of TVS clamps is the sudden on and off of the clamp can aggravate EMI more than the softer RCD clamp. Ther are ways to mitigate this too, but your first priority is to get your system running.

    Your last question about the 250uH inductance in PMP30092 is a good one.  I don't know for sure myself, but I suspect that a 160W DCM flyback would have excessively high peak currents, so the designer chose higher Lm to force most of the operation into CCM to bring the peak current down.  I can't think of any other good reason.

    Good luck with your cross-regulation efforts, and don't forget to involve the pcb layout.  Possibly reduce some loop areas and maybe deliberately increase a few select others. 

    Regards,

    Ulrich