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ISO5852S: Fault output voltage dropped during normal condition

Part Number: ISO5852S

Dear sir,

we are using ISO5852s for our inverter and the driver circuit is given below.

The same circuit is followed for all the six switches in the inverter. 

The fault output circuit is given below. 

During normal operation, please find the below voltages. 

Vcc1 - GDN1 : 4.98V

RDY : 4.28V

FLT output : 3.328V

RDY output : 4.96V 

During the normal operation, the fault output is 3.28V. so the BC857 (Q20) always goes to ON state and the fault LED (D66) always in the ON state. 

Could you please suggest the suitable procedure to get the 5V output in the fault output and control the operation of fault LED? 

Thanks & regards,

Rajasekaran. 

  • Hi Rajasekaran,

    I believe that the circuit you've shown will work to tie multiple FLT output pins together. However, in your first schematic IN+ is tied to the FLT pin when it should be tied directly to VCC if you are using IN- as the input signal; it should not be pulled to VCC through a pullup resistor. It may be the reason for your challenge.

    Regards,

    Audrey

  • Hi Audrey,

    we are using global shutdown option and prepared the schematic based on the below circuit. 

    10.2.2.5 Global shutdown and reset option in the iso5852s datasheet. 

    We already prepared the PCB based on the above schematic. is it possible to do any other alternative to solve this issue ? 

    Thanks & regards,

    Rajasekaran. 

  • Hi Rajasekaran,

    IN+ has an internal pulldown resistance of 50kOhms to GND, so if you have connected these to the nFLT pin, then there is a voltage divider here with the 10k external pullup and the paralleled 50kOhms pulldown of the six drivers. It would work if there was a pullup resistor at each nFLT pin. Since it looks like you have just one pullup resistor for all FAULT signals AND you have connected the nFLT pin to IN+, then you could reduce the pullup resistance to a smaller value, such as 5kOhms. This is fine for evaluation, but I would recommend in the final design to directly tie IN+ to VCC and to remove connection to nFLT.

    Additionally, if you need to evaluate this board without IN+ and nFLT connection keeping the 10kOhm pullup, you could float the IN+ pin off of the pad and then solder it directly to VCC1 using a short wire. 

    Regards,

    Audrey

  • hi,

    Kindly confirm the following details. 

    1. We dont want to remove the IN+ pads.  Iif we leave the FLT output functionality in the LED, does it affect the performance of the driver ? 

    2. The pull up current of FLT and RDY is mentioned as 100uA. is it allowed to change the value ? 

    3. The pull up resistor for the FLT is recommended as 10kOhm. Is it allowed to increase this value ? 

    Kindly confirm the same. 

    Thanking you.

    Thanks & regards,

    Rajasekaran.

  • Hello Rajasekaran,

    You need to ensure a strong pullup on IN+ to VCC1 so that the output will follow IN- properly (where IN+ should be >0.7*VCC1). Currently, this is not the case. The LED will not affect this.

    To increase the voltage at the IN+ and the nFLT output, then it is necessary to reduce the pullup resistance. The pullup resistance should be greater than 1kOhms. Based on the test condition for VOL, 5mA is forced to nFLT resulting in VOL of 0.2V; so this pin can sink 5mA. But you should ensure your supply can handle that when your pullup is at a minimum of 1kOhm. 

    My primary recommendation is to separate the IN+ pin from nFLT and tie directly to VCC1. This is best practice.

    You may test with a lower pullup resistance at a minimum of 1kOhm if your supply is able to handle the quiescent current.

    The leakage current of 100uA is when the nFLT pin is grounded, and is not a max specification.

    Regards,

    Audrey

  • Hi Audrey,

    Thanks for your guidance. 

    we will implement this solution.

    Thanks & regards,

    Rajasekaran.