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TPS63900: High-level and Low-level input voltage of EN Pin

David Tandri
Expert 1355 points
Part Number: TPS63900
Other Parts Discussed in Thread: CC2642R

Hi,

TPS63900 has VIL of 0.4V minimum and VIH of 1.2V maximum.

If I have incoming 0.66V (to indicate LOW) from MCU GPIO into TPS63900 EN pin, will the EN pin see 0.66V as LOW state?

Thanks

  • 0
    TI__Mastermind 21565 points

    Hi David:

    I afraid the status is uncertain. Please make sure the En pin larger than 1.2V or lower than 0.4V. 

    What's the high level for your GPIO?

  • 0 in reply to Minqiu Xie
    Expert 1355 points

    Hi,

    High level is 2.64V.

    You mean the MCU GPIO has to give out voltage level lower than 0.4V for the regulator EN pin to intepret as LOW?

    Thanks

  • 0 in reply to David Tandri
    TI__Mastermind 21565 points

    Hi David:

    Yes, only below 0.4V can make sure the converter disable. Otherwise the stratus is uncertain, and may have misbehavior.

    How about use a divided resistance to give half voltage? Low:0.66/2=0.33V, High:2.64/2=1.32V. Then it could cover the High and Low range well.

    By the way, may I know what MCU you use? If it's a common case, I will feedback to team to check if we should consider it in new parts.

  • 0 in reply to Minqiu Xie
    Expert 1355 points

    Hi,

    Ok, thanks for the suggestions.

    I am using CC2642R.

    Thanks

  • 0 in reply to David Tandri
    TI__Mastermind 21565 points

    Hi David:

    I checked CC2642R datasheet. I didn't find the 0.66V for low level. Did you measure it?

    According to the datasheet, it seems OK if just connect EN to the GPIO. But as I'm not familiar with MCU, it's better to double check with MCU team.

  • 0 in reply to Minqiu Xie
    Expert 1355 points

    Hi,

    My MCU CC2642R VDDS is 3.3V. Therefore, 0.2 x 3.3V = 0.66V.

    I knew it from another CC2642R post. It seems like VIH and VIL are the same as VOH and VOL respectively. I have a doubt on this too. VOH and VOL can't be found on datasheet at 3.3V supply voltage.

    Can double check on these VOL and VOH values?

    Thanks

  • 0 in reply to David Tandri
    TI__Mastermind 21565 points

    Hi David:

    Just let you know I'm checking with CC2642 team.

    It's also a good chance for me to learn MCU. Thanks for point out. 

  • 0 in reply to Minqiu Xie
    TI__Guru**** 317180 points

    David, do you have the link to the E2E post you found about the VOH/ VOL levels? From how I read the datasheet I believe the answer you found is not correct. 

    First, VOH/ VOL will be very close to VDD/ gnd if you don't load the DIO. The data in the datasheet is measured with the max current the DIOs can deliver. If you look at VOL with 4 mA current the VOL is 0.21 V @ 1.8 V and 0.40 V @3.0 V which is less than 0.14*VDD.

    I assume that you are not going to draw 4 mA from the DIO when you are using this as a control signal meaning that the VOL will be lower than 0.14*VDD. 

  • 0 in reply to TER
    Expert 1355 points

    Hi,

    I was having doubts too on those VOL and VOH numbers. Thanks for confirming those are not correct numbers.

    This is the link: 

    https://e2e.ti.com/support/wireless-connectivity/bluetooth/f/538/p/909470/3361019#3361019

    VOL is less than 0.14*VDD. How about VOH?

    Thanks

  • 0 in reply to David Tandri
    TI__Guru**** 317180 points

    I looked closer at the number and it looks like the spec (input to R&D) is 0.2*VDD/ 0.8*VDD as min/ max VOL/VOH when sourcing/ sinking 4 mA/ 8 mA. The number in the datasheet is typical. 

    The typical for VOH (4 mA source) is 0.88*VDD. If you are using a pull-up the current draw will be a fraction of this and VOL/ VOH will be much closer to the rails. 

  • 0 in reply to TER
    Expert 1355 points

    Hi,

    If VOL/VOH is closer to the rails due to lower current drawn, how about VIL/VIH?

    Are VIL/VIH values also vary based on received current?

    Or VIL/VIH values are fixed?

    Thanks

  • 0 in reply to David Tandri
    TI__Guru**** 317180 points

    It's maybe easier to look at this at transistor level. Simplified, both the input and output are inverters. 

    For the output, lets say you want to output a logic '1', then the input to the inverter is a logic '0' to turn the PMOS fully on. If you don't have any load on the output of the PMOS, the drain-source voltage of the transistor will be low. But if you put a resistor from the output to ground the output voltage will be a resistor divider between the on resistance in the transistor and the resistor. So if you want to be close to the rail you have to have a large transistor and a small load.

    For the input: We want a defined '1' or '0' from the output of the transistor. If VDD is 3 V and the input is 1 V (as an example) you have turned on both transistors in the inverter and the output will be somewhere in the middle. This is an undefined level  (and increase the current consumption). For the input you normally don't sink any current, the levels defined are typically what you can apply to the input of the inverter and still have a logic level at the output.