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TPS62173: Output behaviour when input is below the normal minimum??

Part Number: TPS62173

Hi - Data sheet is not definitive and WEBENCH will not allow appropriate settings to be made to simulate this situation. If my input voltage to the TPS62173 (5V out option) drops below the point where the part can regulate (eg input drops to 4.0V), is it GUARANTEED that the part will maintain with the top mosfet at 100% and the lower mosfet at 0%, so that the output will reflect the input voltage (less the RdsOn of the top mosfet and the Rdc of the inductor, of course)? Will this condition persist as the input decays all the way down to the point where the UVLO kicks in? The data sheet paragraph 8.4.4 suggests that this should be the case, but does not categorically say so, and I cannot make Webench accept the right numbers to try and simulate this condition. Thanks

  • WEBENCH does input validation and has checks in place so it won't take inputs that do not work - for example you cannot specify Vin < Vout for a buck converter. You are correct about the operation of the device that it will keep the high-side FET on even when Vin < Vout but above UVLO threshold. Once UVLO threshold kicks in, the device shuts down. When Vin < Vout, Vout will be lesser than Vin by the voltage drop across high-side FET on-resistance and inductor DCR.

    Regards,

    Amod