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TLV757P: Current Protection Future

Kazuki Kitajima
Intellectual 1480 points
Part Number: TLV757P

Hello team!

Could you please tell me the current protection behavior about the device?

I read 7.3.3 on DS but not sure my understanding is correct or not.

For the short event, the current is limited by 755mA(typ).

For the overcurrent event, the current is limited to about 1.2A(Fig27).

and both case, the current is limited until thermal shutdown function is triggered, is this correct?

If this is correct, is there any formula to estimate the time for thermal shutdown occurs?

Thank you for your support.

Best Regards,

Kazuki Kitajima

  • 0
    TI__Mastermind 43570 points

    HI Kitajima-san,

    Your understanding is correct.   Unfortunately, the thermal shutdown will depend on the PCB layout. To first order, you can use TJA  to estimate the power dissipation where the thermal dissipation will occur:

    TJ=TA+(VIN-VOUT)*IOUT*TJA

    Where :

    TJ is the junction temperature of the die. 

    TA is the PCB ambient temperature

    VIN is the input voltage

    VOUT is the output voltage or in this case 0V

    and IOUT is ISC which is 755mA(typ)

    The PCB layout can help to lower the TJA as discussed in the following application report. 

    Once TJ exceeds the thermal shutdown threshold, there is almost no delay to thermal shutdown. 

    Does this help to answer your question?

  • 0 in reply to JCHK
    TI__Intellectual 1480 points

    Hi John-san,

    Thank you for your answer.

    Understood. I'm going to explain this.

    One question, 

    Is there any time-related threshold to distinguish between the short events or others?

    Let's say if the inrush current(100us and might exceed both 755mA and 1.2A) occurs, which current limit value will be used?

    Best Regards,

    Kazuki Kitajima

  • 0 in reply to Kazuki Kitajima
    TI__Mastermind 43570 points

    HI Kitajima-san,

    I suspect at startup the ISC is the first current limit. If you look at the startup profile, you see a nice monotonic rise:

    This plot is taken with only 1uF of output capacitance. So with more output capacitance the profile will likely change. 

    When I defined the TLV767, I made sure that the inrush control and fold-back current limit control very strong. 

    You are correct that usually whenever the output is short that the likely result is thermal shutdown. 

    I hope this answers your question.

  • 0 in reply to JCHK
    TI__Intellectual 1480 points

    Hi John-san,

    Thank you for your answer.

    Please see and correct/answer the summary based on your comment below.

    For inrush current, it would be prevented by soft-start function even if the rising time is about 100us.

    For the short event, the current is limited to around 755mA.

    For the overload(over current) event, the current is limited around 1.2~1.5A(based on fig27)

    How to identify short events or overload events internally?

    Thank you for your support.

    Best Regards,

    Kazuki Kitajima

  • 0 in reply to Kazuki Kitajima
    TI__Mastermind 43570 points

    HI Kitajima-san,

    The best way to see the difference is by the nature of the over-current event. For example, if the load is raised to 2A, then the brick wall limit of 1.2-1.5A might engage.  But if the about is suddenly shorted, then the difference between VIN and VOUT will be large enough such that the ISC limit of ~755mA will engage. 

    Does this help to clarify?

    Thanks,

  • 0 in reply to JCHK
    TI__Intellectual 1480 points

    Hi John-san,

    Thanks a lot!

    Now it's clear.

    Best Regards,

    Kazuki Kitajima