Hi,
Whilst designing with this tracker regulator I needed to test a situation where Vout rises above Vin. This is an expected circuit condition and needs to be analysed. However I discovered that the model of the TPS7B4254 generates a current out of the VIN pin under certain conditions. It seems to be related not just to the VOUT VIN differential voltage but in some way to the collapse of the REF voltage whilst VIN is higher than VOUT. Under these conditions VIN rises uncontrolled to a voltage higher than any source present elsewhere else in the simulation. I thought maybe it was the PFETs switching off and discharging into the source, but the macro model is using VSWITCHs rather than true PMOS simulations and regardless this is a large amount of energy. So I assume a current source in the model is misbehaving.
The TINA schematic I have attached shows the issue, but this is not as dramatic as when simulated under LTSpice, in this case I see VIN rise to well over 100V and drives 4A into the source supply for over 500uS. Is this really possible?
I realise that this is perhaps considered a corner case, but the datasheet for the part makes quite a big deal out of describing and promoting this protection feature, indicating reverse protection within 1mS of Vout>Vin. This is a critical part of my design, but because of the model behaviour I just spent several hours trying to track down why I was seeing huge reverse currents flowing under these conditions. In fact the series input didoe was exceeding its max reverse voltage and avalanching into the shorted input supply.
I thought I would draw your attention to the issue, and please if you can confirm, I will proceed with caution and a assuming I am correct, a fixed model would be appreciated. But of course better still would be clarification that this is not in fact expected behavioTPS7B4254-Q1_OUT_TO_IN_Woops.tscur?
All the best
Aidan
