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UCC21750-Q1: Driver Safety with respect to DESAT pin

Part Number: UCC21750-Q1
Other Parts Discussed in Thread: UCC21732-Q1, , UCC21750, ISO5452-Q1, UCC21710-Q1

Hello all,

I'm planning to use the UCC21750-Q1 for my Gate driver for an inverter. I've been reading the documentation for some time. I've been trying to correlate with the reference design of the UCC21732-Q1.

1. The UCC21750-Q1 has DESAT pin as opposed to a OC pin on the UCC21732-Q1. Under the application information of the UCC21750-Q1 as attached here


The data sheet recommends the use of a schottky diode for the negative voltage damage suppression and zener for the positive voltage protection. There isn't any schematic for the same given. I was wondering if I could alternately use a schottky both for negative and positive voltage protection. That is, Schottky to COM for negative voltage protection and Schottky to VDD for positive voltage protection. Please tell me if this can be done and if there is something I'm missing why the datasheet clearly states the recommended use of Schottky+Zener and not Schottky+ Schottky

Also, if I were to use Schottky Diodes, which would be the key parameters to aim for? Currently, I'm looking at reverse breakdown greater than my bipolar voltage supply, but I'm not sure how to arrive at the other parameters. Could you please help on this?

2. On the above, just to be sure could you tell me if those three conditions are applicable only if the DESAT pin is not used. I believe not as if I were to use the DESAT pin I will need the clamp protection that these diodes would provide.

3. Do I need to clamp the Gate pin (after Rgon & Rg0ff) to VDD and VEE for this design? The datasheet suggests internal diodes upto VDD only. But since I'm planning to use a Bipolar supply do I need to do it externally for the Negative voltage?



Thank you!

  • Hey,

    I'm not sure if you can view the images so I shall quote the pages from the datasheet and the corresponding sections for ref.

    1. Page 41, 9.2.2.6 Overcurrent and Short Circuit Protection
    3. Page 28-29, 8.3.5 Short Circuit Clamping


    Thank you again!

  • Harsh,

    Harsh Songara said:
    1. The UCC21750-Q1 has DESAT pin as opposed to a OC pin on the UCC21732-Q1. Under the application information of the UCC21750-Q1 as attached here

    We are in the process of uploading the full design files (waiting on the team to post them to the web). I will attach the full design files for the UCC21750 EVM here so you can use them before they get uploade. It will be same file. If you open schematic, you can change the variant in Altium and see the exact changes on the PCB in 3d view (which becomes no pop)

    2626.UCC217XXQDWEVM-025.zip

    The relevant protection diodes are shown below along with P/Ns, its from the same EVM guide, i recommend you to use both Zener and schottky. <1A for the schottyky and you are correct about the voltage rating, should be >VDD-VEE. The reason for schottky is not exactly the same as a zener clamp, basically its to prevent any noise from switching coupling to DESAT pin and bringing it below zero, you need that fast response there, a zener couldn't do that exactly as a schottky. Zener should be used as well.

    Harsh Songara said:
    2. On the above, just to be sure could you tell me if those three conditions are applicable only if the DESAT pin is not used. I believe not as if I were to use the DESAT pin I will need the clamp protection that these diodes would provide.

    If desat, yes you need those protection diodes because of the nature of how DESAT detection works, wheras OC you do not. For the UCC217xx variants with OC pin, those Diodes are Not populated.

    Harsh Songara said:
    3. Do I need to clamp the Gate pin (after Rgon & Rg0ff) to VDD and VEE for this design? The datasheet suggests internal diodes upto VDD only. But since I'm planning to use a Bipolar supply do I need to do it externally for the Negative voltage?

    That depends on the system need. Its not uncommon to see TVS across Gate/Emitter pins. In the EVM design, there is D9 which is the TVS diode.

    Please let me know if you have further questions, if i've answered your question please let me know by pressing the green button.

    best
    dimitri

  • Hello Dimitri,


    Your help here is highly appreciated! 
    I shall take a look at the design files and your comments get back if any queries!

    Thank you

  • Harsh,

    BTW I was discussing your question about using 2 Schottky diodes (one replaces the zener), and cathode of that schottky connect to VDD

    This should be OK, since the ABS max of DESAT pin voltage could support a schottky there without risk of exceeding the Abs.Max condition of voltage on DESAT pin.

    and i realize i didn't answer fully about purpose of TVS, it is to suppress overshoot/undershoot and ringing on the gate caused by switching and can be made worse by hard switching.

    Best

    Dimitri

  • Hello Dimitri,

    First of all, hope you're having a great week.

    dimitri james said:
    BTW I was discussing your question about using 2 Schottky diodes (one replaces the zener), and cathode of that schottky connect to VDD


    Thank you getting back. This is actually what I wanted to ask, but yes this is clear now. However, a follow up question exists. Is using the Schottky+Zener in any manner more beneficial than the Schottky+Schottky as:

    • This was the only solution mentioned in the datasheet
    • Review of a couple of reference materials online suggested the use of the above methodology as the datasheet

  • With respect to these comments, I also had a few queries. These are as follows:

    1.

    dimitri james said:
    <1A for the schottyky


    Why must this current be less than 1A specifically? Is there any calculation for this that I can review/access?

    2.
    dimitri james said:
    The reason for schottky is not exactly the same as a zener clamp, basically its to prevent any noise from switching coupling to DESAT pin and bringing it below zero


    I did my bit of research on this and I believe that I do understand the concept here. From my memory of reading the ISO5452-Q1 datasheet, I remember the HV DESAT diodes must have a low reverse capacitance and must be fast recovery. The capacitance is of great importance here because of the dV/dt getting coupled as a part of the Capacitive Voltage divider between the HV diodes and the blanking capacitor.

    So, I think that the Schottky diode must be chosen such that this dV/dt at the DESAT pin with reference to COM must be low enough so that the DESAT pin does not get pulled lower than COM-0.3V.

    Please correct me if I'm wrong.

    If this is correct, I would like to show you a few of my calculations based on my design parameters, but would like to keep them off this thread. Please do tell me how I can do so at your convenience.

    3. In order to alter my VDESAT threshold appropriate to my IGBT's VCE can I use a Zener Diode as used in other of TI's DESAT applications?

    I appreciate your help!!

  • Harsh,

    Harsh Songara said:
    Why must this current be less than 1A specifically? Is there any calculation for this that I can review/access?

    We don't have a calculation, but a colleague had done a study using schottky diode to protect the gate driver itself from ringing, the spec for peak current capability should be on the order of 1A, and voltage rating should be set to at least exceed VDD-VEE.

    Harsh Songara said:
    I did my bit of research on this and I believe that I do understand the concept here. From my memory of reading the ISO5452-Q1 datasheet, I remember the HV DESAT diodes must have a low reverse capacitance and must be fast recovery. The capacitance is of great importance here because of the dV/dt getting coupled as a part of the Capacitive Voltage divider between the HV diodes and the blanking capacitor.

    So, I think that the Schottky diode must be chosen such that this dV/dt at the DESAT pin with reference to COM must be low enough so that the DESAT pin does not get pulled lower than COM-0.3V.

    This is one reason yes, which is why schottky is usally placed on in // with the zener and tied to COM/ IGBT emitter, to provide protection against DESAT going below com.

    Additionally, the RED schottky can be used in lieu of 12V zener as there is not a chance of exceeding maximum condition on DESAT pin.

    Harsh Songara said:
    3. In order to alter my VDESAT threshold appropriate to my IGBT's VCE can I use a Zener Diode as used in other of TI's DESAT applications?

    Yes, as shown in the above image, there is the 3V zener which is used to decrease the DESAT threshold. this would increase the apparent DESAT threshold by 3V.

    You can see a previous thread discussing this here

    Also, if you desire more precision, other parts in UCC217xx family that have OC pin, you are able to pick an arbitrary DESAT voltage and set it with a resistor divider.

    Let me know if you have further questions

    Best

    Dimitri

  • Hello Dimitri, 

    Thank you for your answers. 

    dimitri james said:
    We don't have a calculation, but a colleague had done a study using schottky diode to protect the gate driver itself from ringing, the spec for peak current capability should be on the order of 1A, and voltage rating should be set to at least exceed VDD-VEE.

    Pertaining to the above:
    How much should the HV diode's junction capacitance be smaller than the Capacitance of the Blanking Capacitor? From my minimum Blanking capacitor which is 27pF, I find that HV diodes available in market are around ranging between 5-20pF. I'm still on the lookout for other such HV diodes. I'm currently considering increasing the Blanking capacitor to about 100pF to maybe suit the dV/dt requirements. Knowing how much the HV diode capacitance must be smaller than the Blanking capacitance would assist purpose. I would have been able to define a benchmark using the EVM design, but the HV diode used, STTH112 - STM.pdf does not specify the Junction Capacitance. 

    Additonally, I have been able to calculate the total dV/dt that an IGBT turn-off might result in. Since, the HV diode and the Blanking Capacitor in series form a voltage divider. This dV/dt will get attenuated by a factor. So I was wondering if I can correlate this dV/dt at the DESAT pin after attentuation to select appropriate specifications for a Schottky Diode. Please let me know if this is the approach use to size the continuous current of the Schottky Diode.

    dimitri james said:
    This is one reason yes, which is why schottky is usally placed on in // with the zener and tied to COM/ IGBT emitter, to provide protection against DESAT going below com.


    From my product research I've found that the Schottky diode has a capacitance which is not very much different from the minimum blanking capacitance I calculated. My minimum blanking capacitance is about 27pF. And some of the Schottky's I have seen have about 27pF too. So, when you say that the Schottky & both the Zener would be placed in parallel to the Blanking capacitor, I believe I would need to consider the junction capacitances of both these devices along with the blanking capacitor of my choice while calculating Blanking time? I haven't seen this particular in any of the resources I have been able to access to date. Was any such observation made by Texas Instruments while testing EVMs and Gate drivers in general. 

    dimitri james said:
    Also, if you desire more precision, other parts in UCC217xx family that have OC pin, you are able to pick an arbitrary DESAT voltage and set it with a resistor divider.

    I shall explore this option right away.

    Also, I believe you missed out on a previous query dated July 7th 5:48 P.M. (right before the previous message of mine you replied to). Please do look into and provide your inputs.

    Thank you!

  • Harsh,

    Thank you getting back. This is actually what I wanted to ask, but yes this is clear now. However, a follow up question exists. Is using the Schottky+Zener in any manner more beneficial than the Schottky+Schottky as:

    There shouldn't be a huge benefit to go either way. Zener could be used in cases where VDD is close to max supported, then better to use a zener.

    Harsh Songara said:
    How much should the HV diode's junction capacitance be smaller than the Capacitance of the Blanking Capacitor?

    We don't have any guideline for this.

    Harsh Songara said:
    From my product research I've found that the Schottky diode has a capacitance which is not very much different from the minimum blanking capacitance I calculated. My minimum blanking capacitance is about 27pF. And some of the Schottky's I have seen have about 27pF too. So, when you say that the Schottky & both the Zener would be placed in parallel to the Blanking capacitor, I believe I would need to consider the junction capacitances of both these devices along with the blanking capacitor of my choice while calculating Blanking time? I haven't seen this particular in any of the resources I have been able to access to date. Was any such observation made by Texas Instruments while testing EVMs and Gate drivers in general. 

    Of course the capacitance will be impacted by the diodes hanging off the desat pin as well as lots of other factors, but in our own documents we have never suggested to consider capacitive impact from the zener or schottky diodes, and I don't think we have any studies on this. Since they are on the same order as your blanking, you could consider the capacitance from your zener / schottky when reverse biased, it migh tbe more accurate. Regardless, the diodes cap is very nonlinear too, and theres even other variables to consider. it still will never be accurate as your calcualtion. Blanking time should be on the order that you calculated but will never be exactly what you calculated. Sorry, i dont have any more specific information than this.

    Harsh Songara said:
    I shall explore this option right away.

    Great, if you need any more information about those parts let me know.

    best

    dimitri

  • Hello Dimitri,

    If I were to use to Overcurrent Protection, then I would go with the UCC21710-Q1 as it has an internal clamp function. After going through the documentation, my implementation type could only be on with the DESAT as I do not have a senseFET. 

    In the applications information, it is detailed that a current source must be created externally. The one in the datasheet is a resistor divider, whilst from what I could gather till now, the one in the EVM designs is a current source designed using BJTs. I'm considering the BJTs, however I do not wish to complicate my design by a lot. So, is the resistor divider scheme reliable enough to use considering temperature and loading effects?

    As well, the calculator for the UCC21710-Q1 does not indicate the drop across the RDESAT resistor (I believe that is because it would lead to a complicated equation). Anyway, I replaced the IGBT with a source voltage in TINA with a diode close to the Vf of my HV diode and evaluated the resistors in the resistor divider. Is this a convenient approach?

    Additionally, just for the purposes of confirmation:
    (i) What must be order of the resistors along the resistor divider path? I have taken b/w 5-15kohms
    (ii) I have replaced the 12V Zener with a 3V Zener as the Max OC pin voltage could be 6V. Although there was no mention of the use of Zener in datasheet. Please do let me know, if his would be required at all.

    Thank you.

  • Hello Dimitri,

    Just to add into the previous post, in case I choose to use the DESAT protection in UCC21750-Q1 over the OC devices in UCC217xx-Q1, I have realised that I will need a zener diode to reduce the V(desat,trigger).

    dimitri james said:

    I have seen the post attach in the message here. One query here is, when after a turn-off event the current may pass through the reverse biased HV diode. This reverse current must flow through the Zener diode. We aim to sink this current through the Schottky Clamp-down to COM. So, to say all these devices must be rated appropriately for that current. 

    However, in the components used in the EVM, the HV diode RS1MB-13-F can handle a peak reverse current upto 200uA while the Zener MMSZ4683 can handle only about 0.8uA peak. Since, this is an established EVM we are talking about here, am I wrong about something here? I can't quite figure it out. 

    Thank you

  • Harsh,

    Let me check that in a bit and get back later tonight!

    Best

    DImitri

  • Hello Dimitri,

    Did you have a chance to take a look at the last two queries?

    Harsh

  • Harsh,

    The zener current spec as listed in the datasheet is different the "reverse" current listed is more like how much current it takes at the Zener voltage knee, it is rated for 500mW which is closer to a quarter Amp DC, peak current capability will be much higher. I believe this is is just specific to how zeners are rated as more of power/ protection device.

    For HV diode:. The number you should be concerned about is the forward peak rating, which is it on the order of 10s of Amps (30A) so its perfectly capable.

    The 200uA number you have suggested is the current flowing back throught the device when the device is reverse biased at its max working voltage, meaning Collector of IGBT is 1000V+ higher potential than VDESAT. This is not a number you should concern with because if your system is designed such that youre constantly pushing current back through the diode it will fail. You should spec that HV diode > than the max voltage you expect at collector. Or, you can place two in series.

    Basically, those parts/ratings are OK!

    Best

    Dimitri

  • Hello Dimitri,

    dimitri james said:
    The 200uA number you have suggested is the current flowing back throught the device when the device is reverse biased at its max working voltage, meaning Collector of IGBT is 1000V+ higher potential than VDESAT. This is not a number you should concern with because if your system is designed such that youre constantly pushing current back through the diode it will fail


    I believe you checked the characteristics at 25C. At higher Junction Temperatures, the HV diode is passing tens of uA. 


    I have a pack voltage of 150V. Double to adjust for overshoots, I can experience as much as 300V. 30% of 1000V which is the maximum vlocking voltage of the HV diode. Let's say the junction temperature goes up to 85C due to continuous pulsing at the HV diode. Then, it is safe to assume that the diode will be letting tens of uA through itself. While my Zener would not be able to take it.

    Also, could you please check these queries asked previously


    "If I were to use to Overcurrent Protection, then I would go with the UCC21710-Q1 as it has an internal clamp function. After going through the documentation, my implementation type could only be on with the DESAT as I do not have a senseFET. 

    In the applications information, it is detailed that a current source must be created externally. The one in the datasheet is a resistor divider, whilst from what I could gather till now, the one in the EVM designs is a current source designed using BJTs. I'm considering the BJTs, however I do not wish to complicate my design by a lot. So, is the resistor divider scheme reliable enough to use considering temperature and loading effects?

    As well, the calculator for the UCC21710-Q1 does not indicate the drop across the RDESAT resistor (I believe that is because it would lead to a complicated equation). Anyway, I replaced the IGBT with a source voltage in TINA with a diode close to the Vf of my HV diode and evaluated the resistors in the resistor divider. Is this a convenient approach?

    Additionally, just for the purposes of confirmation:
    (i) What must be order of the resistors along the resistor divider path? I have taken b/w 5-15kohms
    (ii) I have replaced the 12V Zener with a 3V Zener as the Max OC pin voltage could be 6V. Although there was no mention of the use of Zener in datasheet. Please do let me know, if his would be required at all."

  • Harsh,

    Harsh Songara said:
    I believe you checked the characteristics at 25C. At higher Junction Temperatures, the HV diode is passing tens of uA. 

    Harsh Songara said:
    I have a pack voltage of 150V. Double to adjust for overshoots, I can experience as much as 300V. 30% of 1000V which is the maximum vlocking voltage of the HV diode. Let's say the junction temperature goes up to 85C due to continuous pulsing at the HV diode. Then, it is safe to assume that the diode will be letting tens of uA through itself. While my Zener would not be able to take it.

    That zener can handle any reverse leakage thru the HV diode no problem. Do not worry about that at all.. Zeners are even used directly in series with ext gate resistor on the output for some applications which sink/source large currents forward/reverse.

    Harsh Songara said:
    In the applications information, it is detailed that a current source must be created externally. The one in the datasheet is a resistor divider, whilst from what I could gather till now, the one in the EVM designs is a current source designed using BJTs. I'm considering the BJTs, however I do not wish to complicate my design by a lot. So, is the resistor divider scheme reliable enough to use considering temperature and loading effects?

    If youre referring to this highlighted circuit from the EVM, this is not for DESAT. EVMs don't implement OC pin for DESAT. This is a circuit for OC which can be used to signal condition the shunt voltage when measurement is taking at resistor tail (such as for Kelvin/split source devices).

    For more information, please see my colleagues very good explanation of this https://e2e.ti.com/support/power-management/f/196/p/813147/3010935#ucc217xx_ockelvin

    Harsh Songara said:
    (i) What must be order of the resistors along the resistor divider path? I have taken b/w 5-15kohms
    (ii) I have replaced the 12V Zener with a 3V Zener as the Max OC pin voltage could be 6V. Although there was no mention of the use of Zener in datasheet. Please do let me know, if his would be required at all."

    Your range of the range should be fine if those are individual  just make sure the current/power thru your ladder will be safe, if your total bus voltage is 150V, it will consume about 1.5 Watts total if my exponents are correct, which should be fine with a string of quarter watt resistor.

    Zener should not be required I have not seen it used on OC yet, but i dont think it will hurt anything. Because you are dropping the voltage so much thru the divider the chance for overvoltage is extremely unlikely, or if it does happen, it means the entire PCB might have burned up already.

    Any more questions, let me know

    Best
    Dimitri

  • also UCC21750 (DESAT pin) doesn't need any external charge current source (internal) at all nor does other members of teh family which have OC pin, you can follow the design which uses resistor divider taken current from VDD (implementation shown as in the datasheet)

  • Hello Dimitri, Thank you. My queries are clear pertaining to the above.