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TPS22918-Q1: TPS22918-Q1 delay time and rise time

Scarlett Cao
Expert 3360 points
Part Number: TPS22918-Q1
Other Parts Discussed in Thread: TPS22918

Hi team,

My customer is using TPS22918-Q1 and complaining that they have a too-long 2ms delay time. According to their application(Vin=3.3V, Cct=1nF)  I found the typical values of  td=590us and tr=1680us from datasheet, whose sum is approximately 2.3ms. I confirmed with customer that they want the "delay time" (to 90% Vout) to be less than 250us.

I'd like to know whether we have a p2p part of TPS22918 with faster delay time and rise time? If customer decreases Cct, the tr will be shorter according to the formula and table in 8.3.3. What will be the td? The customer is using large Cout, will it cause the issue of inrush current?

Another question is about the definition of timing characteristics. Customer asked about the turn-on control logic. Why the starting point of ton and td is Von rising above 50%?  According to the datasheet, the threshold voltage seems to be 1V? Why it isn't Von rising above 1V?

The customer would like to know the delay time of Von rising above 1V and Vout rising above 50% and 90% respectively. Do you have this data of the recommended part? Thanks

  • 0
    TI__Prodigy 240 points

    Hi Scarlett,

    Thank you for your questions about TPS22918-Q1! I have answered some of your questions and asked for clarification in order to provide you with the best solution:

    1. For the TPS22918-Q1, the rise time, tRISE, is measured from 10% VOUT to 90% VOUT. The delay time, tDELAY, is measured from 50% VON to 10% VOUT. Does the customer want tDELAY + tRISE < 250us?
    2. If the load capacitor, CL, is very large, and the rise time is very fast, this could be an issue with respect to inrush current. What is the value of the load capacitor the customer is using?
    3. As far as the timing characteristics, this is simply an alternative method that was used to calculate tON for the TPS22918-Q1. In our testing, VON has a very fast slew rate making 50% of VON and VIH occur at nearly the same time. Here is a timing waveform diagram from the application report Timing of Load Switches that will help make things more clear:

    Best regards

    Rachel Richardson

     

     

  • 0 in reply to Rachel Richardson1
    TI__Expert 3360 points

    Hi Rachel,

    Thanks for your reply.

    1. Yes, customer want  tDELAY + tRISE < 250us

    2. Load capacitor is 10uF

  • 0 in reply to Rachel Richardson1
    TI__Expert 3360 points

    Here's the schematics

  • 0 in reply to Scarlett Cao
    TI__Prodigy 240 points

    Hi Scarlett,

    In order to meet the requirement of tDELAY + tRISE < 250us, we recommend CT=0. When CT=0, tRISE ~ 95us (from the datasheet). The delay time, tDELAY ~ 64us when CT = 0. Note: This shared data for the delay time is for design reference only and is not guaranteed by TI.

    Also, since CL = 10uF is not too big of a load capacitance, it should not be a problem with respect to inrush current.

    Please let me know if you have any more questions regarding the TPS22918-Q1.

    Best regards,

    Rachel Richardson

    If my reply answered your question, please click the "This resolved my issue" button. This can help others verify that a solution was found!

  • 0 in reply to Rachel Richardson1
    TI__Expert 3360 points

    Hi Rachel,

    Thanks for your reply! I would like to know is the  tDELAY ~ 64us is the data your group collected with EVM when CT=0, Vin=3.3V?

  • 0 in reply to Scarlett Cao
    TI__Prodigy 240 points

    Hi Scarlett,

    Yes, this is the rise time and delay time when CT=0 and VIN=3.3V. 

    Please let me know if you have any more questions regarding the TPS22918-Q1.

    Best regards,

    Rachel Richardson

    If my reply answered your question, please click the "This resolved my issue" button. This can help others verify that a solution was found!