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UCC12050: RSYNC Requirement

Part Number: UCC12050

I'm driving the SYNC pin from an FPGA with a current limit of 3mA, so the even the maximum recommended resistor (1k) would exceed the FPGA pin's current limit. Assuming decent layout, I'm wondering how beneficial adding RSYNC of ~2k would be? What is the input impedance looking into the SYNC pin?

  • Hello Kiron,

    Thank you for your interest in the UCC12050 Isolated Converter.

    From the specification table, it can be seen that the SYNC input is a high-impedance input, drawing less than 1uA with a 5.0V level applied.  

    The purpose of Rsync is to provide a terminating resistance to match any transmission line impedance from the 16mHz source.  Impedance matching will avoid logic-edge ringing from mismatch and reflections.  The value of Rsync is not limited to 1kR.  The recommendation in the Table 3 simply lists typical transmission impedances.  If your FPGA is located very close to the converter, you may not need any Rsync. 

    Still, a 4.7K to 10K load resistor on the FPGA output (at the SYNC pin) might help to keep the signal clean.

    Regards,

    Ulrich